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ADM1033ARQZ-REEL

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ADM1033
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19
consecutive out-of-limit readings are made on the same
temperature channel, the fault queue fills, and the
SMBusALERT
output triggers. To fill the fault queue, one
needs L or more consecutive out of limits on the internal
temperature channel; L or more consecutive out-of-limits on
the external 1 temperature channel; or L or more consecutive
out-of-limits on the external 2 temperature channel. The
fault queue is independent of the state of the bits in the
ALERT
status registers.
Table 23. FAULT QUEUE ADDRESS 0X06
Bits <3:0> Fault Queue
000X 1
001X 2
01XX 3
1XXX 4
To reset the fault queue, do one of the following:
SMBus ARA Command
Read Status Register 1
Power-On Reset
The SMBusALERT
clears, even if the condition that
caused the SMBusALERT
remains. The SMBusALERT is
reasserted if the fault queue fills up.
Conversion Rate Register
The ADM1033 makes up to 64 measurements per second.
However, for the sake of reduced power consumption and
better noise immunity, users may run the ADM1033 at a
slower conversion rate. Better noise immunity results from
the averaging that occurs at the slower conversion rates.
Averaging does not occur at rates of 16, 32, or 64
conversions per second. Table 24 lists the available
conversion rates. Note that the current round-robin loop
must be finished for conversion rates changes to take effect.
Table 24. CONVERSION RATES
Code Conversion Rate
0x00 0.0625
0x01 0.125
0x02 0.25
0x03 0.5
0x04 1
0x05 2
0x06 4
0x07 8
0x08 16
0x09 32
0x0A 64
0x0B to 0xFF Reserved
THERM I/O Timer and Limits
Pin 7 can be configured as either an input or output. As an
output it is asserted low to signal that the measured
temperature has exceeded preprogrammed temperature
limits. The output is automatically pulled high again when
the temperature falls below the THERM
− Hys limit. The
value of hysteresis is programmable in Register 0x1A.
THERM
is enabled as an output by default on powerup.
Figure 32. THERM Behavior
TEMPERATURE
LIMITS
TIME
THERM, 85C
THERM
THERM−HYST,
80C
Once the THERM limits are exceeded, the fans are
boosted to full speed, that is, as long as the Boost Disable Bit
(Bit 1) is not set in Configuration Register 2 (Address 0x02).
To configure THERM
as an input, the user must set the
THERM
timer bit (Bit 2) of Configuration Register 1
(Address 0x01) to 1. (It no longer operates as an output.) The
ADM1033 can then detect when the THERM
input is
asserted low. This may be connected to a trip point
temperature sensor or to the FAN_FAULT
PROCHOT
output of a CPU. With processor core voltages reducing all
the time, the threshold for the AGTL + PROCHOT
output
also reduces down as new processors become available. The
default threshold on the input is the normal CMOS
threshold. However, Pin 8 (FAN_FAULT
/REF) can also be
reconfigured as a REF input. This is done by setting Bit 7
(FAN_FAULT
/REF) in Configuration Register 4 (Address
0x04). Connect the processor V
CCP
to this input to provide
a reference for the THERM
input. The resulting THERM
threshold is 0.75 V
CCP
, which is the correct threshold for
an AGTL + signal.
The ADM1033 also measures assertion times on the
THERM
input as a percentage of a time window. This time
window is programmable in Configuration Register 4
(Address 0x04) by using Bits <6:4> (THERM
% Time
Window). Values between 0.25 seconds and 8 seconds are
programmable. The assertion time as a percentage of the
time window is stored in the THERM
% On-Time Register
(Address 0x4E).
A THERM
% limit is also associated with this register. Once
the measured percentage exceeds the percentage limit, the
ADM1033
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THERM % Exceeded Bit (Bit 4) in Status Register 2 (Address
0x50) is asserted and an ALERT
is generated, that is, if the
mask bit is not set. If the limit is set to 0x00, an ALERT
is
generated on the first assertion. If the limit is set to 0xFF, an
ALERT
is never generated. This is because 0xFF corresponds
to the THERM
input, which is asserted continuously.
Table 25. CONVERSION RATES
Code
THERM %
On-Time Window
000 0.25 s
001 0.5 s
010 1 s
011 2 s
100 4 s
101 8 s
110 8 s
111 8 s
When THERM is configured as an input only, setting the
Enable THERM
Events bits in Configuration Register 4
allows Pin 7 to operate as an I/O.
The user can configure the THERM
pin to be pulled low
as an output whenever the local temperature exceeds the
local THERM
limit. To do this, set the Enable Local
THERM
events bit (Bit 0) of Configuration Register 4
(Address 0x04).
The user can also configure the THERM
pin to be pulled
low as an output whenever the Remote 1 temperature
exceeds the Remote 1 THERM
limit. Set the Enable
Remote 1 THERM
events bit (Bit 1) of Configuration
Register 4 (Address 0x04).
THERM % Limit Register
The THERM % limit is programmed to Register 0x19. An
ALERT
is generated, if THERM is asserted for longer than
the programmed percentage limit. The limit is programmed
as a percentage of the chosen time window.
THERM
% limit register is an 8-bit register.
0x00 = 0%
0xFF = 100%
Therefore, 1 LSB = 0.39%.
Example:
If a time window of 8 seconds is chosen, and an ALERT
is to be generated if THERM is asserted for more than
1 second, program the following value to the limit register:
% Limit = 1/8 100 = 12.5%
12.5%/0.39% = 32d = 0x20 = 0010 0000
An ALERT
is generated if the THERM limit is exceeded
after the time window has elapsed, assuming it is not
masked.
Fan Drive Signal
The ADM1033 contols the speed of up to one cooling fan.
Varying the duty cycle (on/off time) of a square wave
applied to the fan varies the speed of the fan. The ADM1033
uses a control method called synchronous speed control, in
which the PWM drive signal applied to the fan is
synchronized with the fan’s TACH signal. See the
Synchronous Speed Control section for more information.
The external circuitry required to drive the fan is very
simple. A single N-channel MOSFET is the only drive
device required. The specifications of the MOSFET depend
on the maximum current required by the fan and the gate
voltage drive (V
GS
< 3.0 V for direct interfacing to the drive
pin). V
GS
can be greater than 3.0 V, as long as the pullup on
the gate is tied to 5.0 V. The MOSFET should also have a low
on-resistance to ensure that there is no significant voltage
drop across the FET. A high on-resistance reduces the
voltage applied across the fan and therefore the maximum
operating speed of the fan. Figure 33 shows a scheme for
driving a 3-wire fan.
Figure 33. Interfacing a 3-wire Fan to the ADM1033
by Using an N-channel MOSFET
ADM1033
TACH
DRIVE
TACH
Q1
NDT3055L
12 V
FAN
3.3 V
12 V12 V
10 kW
4.7 kW
100 kW
10 kW
1N4148
Figure 33 uses a 10 kW pullup resistor for the TACH
signal. This assumes that the TACH signal is an open
collector from the fan. In all cases, the fan’s TACH signal
must be kept below 5.0 V maximum to prevent damaging
the ADM1033.
If in doubt as to whether a fan has an open-collector or
totem pole TACH output, use one of the input signal
conditioning circuits shown in the Fan Inputs section.
When designing drive circuits with transistors and FETs,
make sure that the drive pins are not required to source
current and that they sink less than the maximum current
specified here.
Synchronous Speed Control
The ADM1033 drives the fan by using a control scheme
called synchronous speed control. In this scheme, the PWM
drive signal applied to the fan is synchronized with the
TACH signal. Accurate and repeatable fan speed
measurements are the main benefits. The fan is allowed to
run reliably at speeds as low as 30 percent of the full
capability.
The drive signal applied to the fan is synchronized with
the TACH signal. The ADM1033 switches on the drive
ADM1033
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21
signal and waits for a transition on the TACH signal. When
a transition takes place on the TACH signal, the PWM drive
is switched off for a period of time called t
off
. The drive
signal is then switched on again. The toff time is varied in
order to vary the fan speed. If the fan is running too fast, the
toff time is increased. If the fan is running too slow, the toff
time is decreased.
Since the drive signal is synchronized with the TACH
signal, the frequency with which the fan is driven depends
on the current speed of the fan and the number of poles in it.
Figure 34 shows how the synchronous speed drive signal
works. The ideal TACH signal is the TACH signal that
would be output from the fan if power were applied
100 percent of the time. It is representative of the actual
speed of the fan. The actual TACH signal is the signal the
user would see on the TACH output from the fan if the user
were to put a scope on it. In effect, the actual TACH signal
is the ideal TACH signal chopped with the drive signal.
Figure 34. Drive Signal by Using Synchronous Control
ACTUAL TACH
DRIVE
IDEAL TACH
POLE TRANSITION POINTS
t
POLE
t
OFF
DASH = TACH FLOATS HIGH BY PULL-UP RESISTOR
SOLID = TRUE TACH WHEN FAN IS POWERED
Fan Inputs
Pin 2 is a TACH input intended for fan speed measurement.
This input is open-drain.
Signal conditioning on the ADM1033 accommodates the
slow rise and fall time of typical tachometer outputs. The
maximum input signal range is from 0 V to 5.0 V, even when
V
CC
is less than 5.0 V. In the event that these inputs are
supplied from fan outputs exceeding 0 V to 5.0 V, either
resistive attenuation of the fan signal or diode clamping
must be used to keep the fan inputs within an acceptable
range.
Figure 35 to Figure 38 show examples of possible fan
input circuits. If the fan TACH has a resistive pullup to V
CC
,
it can be connected directly to the fan output.
Figure 35. Fan with TACH Pullup to +V
CC
5 V or 12 V
FAN
V
CC
FAN SPEED
COUNTER
TACH
OUTPUT
TACH X
PULL-UP
4.7 kW
TYP
ADM1033
DRIVE X
V
CC
100 kW
TYP
If the fan output has a resistive pullup to 12 V (or another
voltage greater than 5.0 V), the fan output can be clamped
with a Zener diode, as shown in Figure 36. The Zener
voltage should be chosen so that it is greater than V
IH
but less
than 5.0 V. Allowing for the voltage tolerance of the Zener,
a value of between 3.0 V and 5.0 V is suitable.
Figure 36. Fan with TACH Pullup to Voltage > 5.0 V,
Clamped with Zener Diode
5 V or 12 V
FAN
V
CC
FAN SPEED
COUNTER
TACH
OUTPUT TACH X
PULL−UP
4.7 kW
TYP
ADM1033
DRIVE X
V
CC
100 kW
TYP
ZD1*
*CHOOSE ZD1 VOLTAGE APPROXIMATELY 0.8 V
CC
If the fan has a strong pullup (less than 1 kW to +12 V) or
a totem-pole output, a series resistor can be added to limit the
Zener current, as shown in Figure 37. Alternatively, a
resistive attenuator may be used, as shown in Figure 38.
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ADM1033ARQZ-REEL

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Buy ADM1033ARQZ-REEL
Manufacturer:
ON Semiconductor
Description:
Board Mount Temperature Sensors +/- 1 C Digital 2-Wire
Lifecycle:
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