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PCA8565BS/1,118

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24P25-P27P28-P30P31-P33P34-P36P37-P39P40-P42P43-P45P46-P48
PCA8565 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2014. All rights reserved.
Product data sheet Rev. 4 — 5 December 2014 46 of 48
NXP Semiconductors
PCA8565
Real time clock/calendar
27. Tables
Table 1. Ordering information . . . . . . . . . . . . . . . . . . . . .2
Table 2. Ordering options. . . . . . . . . . . . . . . . . . . . . . . . .2
Table 3. Marking codes . . . . . . . . . . . . . . . . . . . . . . . . . .2
Table 4. Pin description . . . . . . . . . . . . . . . . . . . . . . . . . .4
Table 5. Register overview and control bits default
values . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .6
Table 6. Register Control_1 (address 00h) bits
description . . . . . . . . . . . . . . . . . . . . . . . . . . . . .7
Table 7. Register Control_2 (address 01h) bits
description . . . . . . . . . . . . . . . . . . . . . . . . . . . . .7
Table 8. Register reset values
[1]
. . . . . . . . . . . . . . . . . . . .8
Table 9. Register Seconds (address 02h) bits
description . . . . . . . . . . . . . . . . . . . . . . . . . . . . .9
Table 10. Seconds coded in BCD format . . . . . . . . . . . . .9
Table 11. Register Minutes (address 03h) bits
description . . . . . . . . . . . . . . . . . . . . . . . . . . . .10
Table 12. Register Hours (address 04h) bits description .10
Table 13. Register Days (address 05h) bits description. .10
Table 14. Register Weekdays (address 06h) bits
description . . . . . . . . . . . . . . . . . . . . . . . . . . . .10
Table 15. Weekday assignments . . . . . . . . . . . . . . . . . .11
Table 16. Register Months_century (address 07h)
bits description . . . . . . . . . . . . . . . . . . . . . . . . .11
Table 17. Month assignments coded in BCD format . . .11
Table 18. Register Years (08h) bits description . . . . . . . .12
Table 19. Register Minute_alarm (address 09h)
bits description . . . . . . . . . . . . . . . . . . . . . . . . .14
Table 20. Register Hour_alarm (address 0Ah)
bits description . . . . . . . . . . . . . . . . . . . . . . . . .14
Table 21. Register Day_alarm (address 0Bh)
bits description . . . . . . . . . . . . . . . . . . . . . . . . .15
Table 22. Register Weekday_alarm (address 0Ch)
bits description . . . . . . . . . . . . . . . . . . . . . . . . .15
Table 23. Register Timer_control (address 0Eh)
bits description . . . . . . . . . . . . . . . . . . . . . . . . .16
Table 24. Timer (address 0Fh) bits description . . . . . . . .16
Table 25. Timer register bits value range . . . . . . . . . . . . .16
Table 26. Register CLKOUT_control (address 0Dh)
bits description . . . . . . . . . . . . . . . . . . . . . . . . .17
Table 27. Flag location in register Control_2 . . . . . . . . . .18
Table 28. Example to clear only AF (bit 3) in register
Control_2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . .18
Table 29. INT
operation (bit TI_TP = 1) . . . . . . . . . . . . . .19
Table 30. First increment of time circuits after STOP
bit release . . . . . . . . . . . . . . . . . . . . . . . . . . . .21
Table 31. Limiting values . . . . . . . . . . . . . . . . . . . . . . . . .28
Table 32. Static characteristics . . . . . . . . . . . . . . . . . . . .29
Table 33. Dynamic characteristics . . . . . . . . . . . . . . . . . .32
Table 34. SnPb eutectic process (from J-STD-020D) . . .38
Table 35. Lead-free process (from J-STD-020D) . . . . . .38
Table 36. Selection of Real-Time Clocks . . . . . . . . . . . . .40
Table 37. Abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . .42
Table 38. Revision history . . . . . . . . . . . . . . . . . . . . . . . .43
PCA8565 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2014. All rights reserved.
Product data sheet Rev. 4 — 5 December 2014 47 of 48
NXP Semiconductors
PCA8565
Real time clock/calendar
28. Figures
Fig 1. Block diagram of PCA8565 . . . . . . . . . . . . . . . . . .3
Fig 2. Pin configuration of PCA8565TS (TSSOP8) . . . . .4
Fig 3. POR override sequence . . . . . . . . . . . . . . . . . . . .9
Fig 4. Voltage-low detection. . . . . . . . . . . . . . . . . . . . . .10
Fig 5. Data flow for the time function . . . . . . . . . . . . . . .12
Fig 6. Access time for read/write operations . . . . . . . . .13
Fig 7. Alarm function block diagram. . . . . . . . . . . . . . . .14
Fig 8. AF timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .17
Fig 9. Interrupt scheme . . . . . . . . . . . . . . . . . . . . . . . . .18
Fig 10. STOP bit functional diagram . . . . . . . . . . . . . . . .20
Fig 11. STOP bit release timing. . . . . . . . . . . . . . . . . . . .20
Fig 12. Bit transfer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .22
Fig 13. Definition of START and STOP conditions. . . . . .22
Fig 14. System configuration . . . . . . . . . . . . . . . . . . . . . .23
Fig 15. Acknowledgement on the I
2
C-bus . . . . . . . . . . . .23
Fig 16. Slave address . . . . . . . . . . . . . . . . . . . . . . . . . . .24
Fig 17. Master transmits to slave receiver (write mode) .24
Fig 18. Master reads after setting word address (write
word address; read data). . . . . . . . . . . . . . . . . . .25
Fig 19. Master reads slave immediately after first byte
(read mode) . . . . . . . . . . . . . . . . . . . . . . . . . . . . .25
Fig 20. Interface watchdog timer . . . . . . . . . . . . . . . . . . .26
Fig 21. Device diode protection diagram of PCA8565. . .27
Fig 22. I
DD
as a function of V
DD
. . . . . . . . . . . . . . . . . . . .30
Fig 23. I
DD
as a function of V
DD
. . . . . . . . . . . . . . . . . . . .30
Fig 24. I
DD
as a function of temperature . . . . . . . . . . . . .31
Fig 25. Frequency deviation as a function of V
DD
. . . . . .31
Fig 26. I
2
C-bus timing waveforms . . . . . . . . . . . . . . . . . .33
Fig 27. Application diagram of PCA8565. . . . . . . . . . . . .33
Fig 28. Package outline SOT505-1 (TSSOP8) of
PCA8565TS. . . . . . . . . . . . . . . . . . . . . . . . . . . . .35
Fig 29. Temperature profiles for large and small
components . . . . . . . . . . . . . . . . . . . . . . . . . . . . .39
NXP Semiconductors
PCA8565
Real time clock/calendar
© NXP Semiconductors N.V. 2014. All rights reserved.
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: salesaddresses@nxp.com
Date of release: 5 December 2014
Document identifier: PCA8565
Please be aware that important notices concerning this document and the product(s)
described herein, have been included in section ‘Legal information’.
29. Contents
1 General description. . . . . . . . . . . . . . . . . . . . . . 1
2 Features and benefits . . . . . . . . . . . . . . . . . . . . 1
3 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
4 Ordering information. . . . . . . . . . . . . . . . . . . . . 2
4.1 Ordering options . . . . . . . . . . . . . . . . . . . . . . . . 2
5 Marking. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
6 Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . 3
7 Pinning information. . . . . . . . . . . . . . . . . . . . . . 4
7.1 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
7.2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 4
8 Functional description . . . . . . . . . . . . . . . . . . . 5
8.1 Register overview . . . . . . . . . . . . . . . . . . . . . . . 6
8.2 Control registers . . . . . . . . . . . . . . . . . . . . . . . . 7
8.2.1 Register Control_1 . . . . . . . . . . . . . . . . . . . . . . 7
8.2.2 Register Control_2 . . . . . . . . . . . . . . . . . . . . . . 7
8.3 Reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
8.3.1 Power-On Reset (POR) override . . . . . . . . . . . 8
8.4 Time and date registers . . . . . . . . . . . . . . . . . . 9
8.4.1 Register Seconds . . . . . . . . . . . . . . . . . . . . . . . 9
8.4.1.1 Voltage-low detector. . . . . . . . . . . . . . . . . . . . . 9
8.4.2 Register Minutes. . . . . . . . . . . . . . . . . . . . . . . 10
8.4.3 Register Hours . . . . . . . . . . . . . . . . . . . . . . . . 10
8.4.4 Register Days. . . . . . . . . . . . . . . . . . . . . . . . . 10
8.4.5 Register Weekdays. . . . . . . . . . . . . . . . . . . . . 10
8.4.6 Register Months_century . . . . . . . . . . . . . . . . 11
8.4.7 Register Years . . . . . . . . . . . . . . . . . . . . . . . . 12
8.5 Setting and reading the time. . . . . . . . . . . . . . 12
8.6 Alarm registers . . . . . . . . . . . . . . . . . . . . . . . . 13
8.6.1 Register Minute_alarm . . . . . . . . . . . . . . . . . . 14
8.6.2 Register Hour_alarm . . . . . . . . . . . . . . . . . . . 14
8.6.3 Register Day_alarm . . . . . . . . . . . . . . . . . . . . 15
8.6.4 Register Weekday_alarm . . . . . . . . . . . . . . . . 15
8.7 Timer functions . . . . . . . . . . . . . . . . . . . . . . . . 15
8.7.1 Register Timer_control . . . . . . . . . . . . . . . . . . 15
8.7.2 Register Countdown_Timer . . . . . . . . . . . . . . 16
8.8 Register CLKOUT_control and clock output. . 16
8.9 Interrupt output . . . . . . . . . . . . . . . . . . . . . . . . 17
8.9.1 Bits TF and AF . . . . . . . . . . . . . . . . . . . . . . . . 17
8.9.1.1 Clearing the alarm flag (AF) . . . . . . . . . . . . . . 18
8.9.2 Bits TIE and AIE . . . . . . . . . . . . . . . . . . . . . . . 18
8.9.3 Countdown timer interrupts. . . . . . . . . . . . . . . 19
8.10 External clock (EXT_CLK) test mode. . . . . . . 19
8.11 STOP bit function . . . . . . . . . . . . . . . . . . . . . . 20
9 Characteristics of the I
2
C-bus . . . . . . . . . . . . 22
9.1 Bit transfer . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
9.2 START and STOP conditions . . . . . . . . . . . . . 22
9.3 System configuration . . . . . . . . . . . . . . . . . . . 22
9.4 Acknowledge . . . . . . . . . . . . . . . . . . . . . . . . . 23
9.5 I
2
C-bus protocol. . . . . . . . . . . . . . . . . . . . . . . 24
9.5.1 Addressing. . . . . . . . . . . . . . . . . . . . . . . . . . . 24
9.5.2 Clock and calendar read/write cycles . . . . . . 24
9.5.3 Interface watchdog timer . . . . . . . . . . . . . . . . 25
10 Internal circuitry . . . . . . . . . . . . . . . . . . . . . . . 27
11 Safety notes. . . . . . . . . . . . . . . . . . . . . . . . . . . 27
12 Limiting values . . . . . . . . . . . . . . . . . . . . . . . . 28
13 Static characteristics . . . . . . . . . . . . . . . . . . . 29
14 Dynamic characteristics. . . . . . . . . . . . . . . . . 32
15 Application information . . . . . . . . . . . . . . . . . 33
15.1 Quartz frequency adjustment. . . . . . . . . . . . . 34
15.1.1 Method 1: fixed OSCI capacitor. . . . . . . . . . . 34
15.1.2 Method 2: OSCI trimmer . . . . . . . . . . . . . . . . 34
15.1.3 Method 3: OSCO output . . . . . . . . . . . . . . . . 34
16 Test information . . . . . . . . . . . . . . . . . . . . . . . 34
16.1 Quality information. . . . . . . . . . . . . . . . . . . . . 34
17 Package outline. . . . . . . . . . . . . . . . . . . . . . . . 35
18 Handling information . . . . . . . . . . . . . . . . . . . 36
19 Packing information . . . . . . . . . . . . . . . . . . . . 37
19.1 Tape and reel information . . . . . . . . . . . . . . . 37
20 Soldering of SMD packages. . . . . . . . . . . . . . 37
20.1 Introduction to soldering. . . . . . . . . . . . . . . . . 37
20.2 Wave and reflow soldering. . . . . . . . . . . . . . . 37
20.3 Wave soldering . . . . . . . . . . . . . . . . . . . . . . . 38
20.4 Reflow soldering . . . . . . . . . . . . . . . . . . . . . . 38
21 Appendix . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40
21.1 Real-Time Clock selection . . . . . . . . . . . . . . . 40
22 Abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . 42
23 References. . . . . . . . . . . . . . . . . . . . . . . . . . . . 42
24 Revision history . . . . . . . . . . . . . . . . . . . . . . . 43
25 Legal information . . . . . . . . . . . . . . . . . . . . . . 44
25.1 Data sheet status. . . . . . . . . . . . . . . . . . . . . . 44
25.2 Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . 44
25.3 Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . 44
25.4 Trademarks . . . . . . . . . . . . . . . . . . . . . . . . . . 45
26 Contact information . . . . . . . . . . . . . . . . . . . . 45
27 Tables . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46
28 Figures . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47
29 Contents. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48
P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24P25-P27P28-P30P31-P33P34-P36P37-P39P40-P42P43-P45P46-P48

PCA8565BS/1,118

Mfr. #:
Buy PCA8565BS/1,118
Manufacturer:
NXP Semiconductors
Description:
IC RTC CLK/CALENDAR I2C 10-HVSON
Lifecycle:
New from this manufacturer.
Delivery:
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