PRELIMINARY
Publication Release Date: January 2003
- 1 - Revision 1.1
WMS7202
256-TAP DUAL-CHANNEL NON-VOLATILE DIGITAL
POTENTIOMETER
WMS7202
- 2 -
1. GENERAL DESCRIPTION
The WMS7202 is a 256-tap, dual-channel non-volatile digital potentiometer available in 10K, 50K
and 100K end-to-end resistances. These devices can be used as a three-terminal potentiometer or
as a two terminal variable resistor in a wide variety of applications.
The output of each potentiometer is determined by the wiper position, which varies linearly between
VA and VB terminal according to the content stored in the volatile Tap Register (TR). The settings of
the TR can be provided either directly by the user through the industry standard SPI interface, or by
the non-volatile memory (NVMEM0~3) where the previous settings are stored. When changes are
made to the TR to establish a new wiper position, the value of the setting can be saved into any non-
volatile memory location (NVMEM0~3) by executing a NVMEM save operation. Each channel has its
own four non-volatile memory locations (NVMEM0~3) that can be directly written to, and read by,
users through the SPI interface. Upon powerup the content of the NVMEM0 is automatically loaded to
the Tap Register.
The WMS7202 contains two independent channels in 14-pin PDIP, SOIC and TSSOP packages and
can operate over a wide operating voltage range from 2.7V to 5.5V. A selectable output buffer is built-
in for each channel for those applications where an output buffer is required.
2. FEATURES
256 taps for each potentiometer
Dual independent, linear-taper channels in one package
End-to-end resistance available in 10K, 50K and 100K
Selectable output buffer for each channel
SPI Serial Interface for data transfer and potentiometer control
Daisy-chain operation for multiple devices
Nonvolatile storage of four wiper positions per channel with power-on recall from NVMEM0
Low standby current (1µA Max. with output buffer inactive)
Endurance 100K typical stores per bit
Register Data Retention 100 years
Industrial temperature range: -40 ~ 85°C
Wide operating voltage range: 2.7V ~ 5.5V
Package option:
14-pin TSSOP, 14-pin SOIC, 14-pin PDIP
WMS7202
Publication Release Date: January 2003
- 3 - Revision 1.1
3. BLOCK DIAGRAM
Serial
Interface
Ta
p
Re
gi
st
er
De
co
de
r
NV Memor
y
Control
SDI
CLK
V
SS
V
A1
V
B1
W1
Ta
p
Re
gi
st
er
De
co
de
r
V
A2
V
B2
W2
WP
SDO
R/B
CS
V
DD
NVMEM0
(
Non-volatile Memor
y
0
;
Powe
r
- on recall
)
NVMEM1
(
Non-volatile Memor
y
1
)
NVMEM2
(
Non-volatile Memor
y
2
)
NVMEM3
(
Non-volatile Memor
y
3
)
NVMEM0
(
Non-volatile Memor
y
0
;
Powe
r
- on recall
)
NVMEM1
(
Non-volatile Memor
y
1
)
NVMEM2
(
Non-volatile Memor
y
2
)
NVMEM3
(
Non-volatile Memor
y
3
)
MU
X
MU
X
Serial
Interface
Ta
p
Re
g
iste
r
Decode
r
NV Memor
y
Control
SDI
V
SS
V
A1
V
B1
W1
Ta
p
Re
g
iste
r
Decode
r
V
A2
V
B2
W2
WP
SDO
CS
V
DD
V
DD
NVMEM0
(
Non-volatile Memor
y
0
;
Powe
r
- on recall
)
NVMEM1
(
Non-volatile Memor
y
1
)
NVMEM2
(
Non-volatile Memor
y
2
)
NVMEM3
(
Non-volatile Memor
y
3
)
NVMEM0
(
Non-volatile Memor
y
0
;
Powe
r
- on recall
)
NVMEM1
(
Non-volatile Memor
y
1
)
NVMEM2
(
Non-volatile Memor
y
2
)
NVMEM3
(
Non-volatile Memor
y
3
)
NVMEM0
(
Non-volatile Memor
y
0
;
Powe
r
- on recall
)
NVMEM1
(
Non-volatile Memor
y
1
)
NVMEM2
(
Non-volatile Memor
y
2
)
NVMEM3
(
Non-volatile Memor
y
3
)
NVMEM0
(
Non-volatile Memor
y
0
;
Powe
r
- on recall
)
NVMEM1
(
Non-volatile Memor
y
1
)
NVMEM2
(
Non-volatile Memor
y
2
)
NVMEM3
(
Non-volatile Memor
y
3
)
MU
X
MU
X

WMS7202050P

Mfr. #:
Manufacturer:
Description:
IC DGTL POT 50KOHM 256TAP 14DIP
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
T/T Paypal Visa MoneyGram Western Union

Products related to this Datasheet