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WMS7202050P
P1-P3
P4-P6
P7-P9
P10-P12
P13-P15
P16-P18
P19-P21
P22-P24
P25-P27
P28-P30
WMS7202
- 16 -
8. TIMING DIAGRAMS
FIGURE 6 – WMS7202 TIMING DIAGRAM
t
LEAD
t
CYC
t
WL
t
WH
t
LAG
t
CS
t
DH
t
DSU
t
LAC
t
PD
t
LRL
t
RSU
t
ST
t
SV
CLK
CS
SDI
SDO
R/B
t
WPSU
t
WPH
WP
MSB
LSB
MSB
LSB
WMS7202
Publication Rele
ase Date: January 2003
- 17 -
Revision 1.1
TABLE 10 – TIMING PARAMETERS
Note: The interface timing characteristics apply
to all parts but are guaranteed by design and not
subject to production test.
PARAMETER SYMBOL
MIN. MAX.
UNIT
SPI Clock Cycle Time
t
CYC
100
ns
SPI Clock HIGH Time
t
WH
50
ns
SPI Clock LOW Time
t
WL
50
ns
Lead Time
t
LEAD
100
ns
Lag Time
t
LAG
100
ns
SDI Setup Time
t
DSU
20
ns
SDI Hold Time
t
DH
20
ns
CS
to SDO – SPI Line Acquire
t
LAC
5
ns
CS
to SDO – SPI Line Release
t
LRL
5
ns
CLK to SDO Propagation Delay
t
PD
1
ns
R/B Rise to
CS
Fall
t
RSU
500
ns
Store to NVMEM Save Time
t
SV
2
ms
CS
Deselect Time
t
CS
600
ns
Startup Time
t
ST
0.1
ms
WP
Setup
Time
t
WPSU
10
ns
WP
Hold Time
t
WPH
10
ns
WMS7202
- 18 -
9. ABSOLUTE MAXIMUM RATINGS
TABLE 11 – ABSOLUTE MAXIMUM RATINGS
Condition Value
Junction temperature
150ºC
Storage temperature
-65º to +150ºC
Voltage applied to any pad
(V
ss
– 0.3V) to (V
DD
+ 0.3V)
V
dd
- V
ss
-0.3 to 7.0V
Note: Exposure to conditions beyond those listed under: Absolute Maximum Ratings, may adversely
affect the life and reliability
of the device.
P1-P3
P4-P6
P7-P9
P10-P12
P13-P15
P16-P18
P19-P21
P22-P24
P25-P27
P28-P30
WMS7202050P
Mfr. #:
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Description:
IC DGTL POT 50KOHM 256TAP 14DIP
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New from this manufacturer.
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