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10
Document Number: 68806
S10-0547-Rev. C, 08-Mar-10
Vishay Siliconix
Si5513CDC
P-CHANNEL TYPICAL CHARACTERISTICS 25 °C, unless otherwise noted
* The power dissipation P
D
is based on T
J(max)
= 150 °C, using junction-to-case thermal resistance, and is more useful in settling the upper
dissipation limit for cases where additional heatsinking is used. It is used to determine the current rating, when this rating falls below the package
limit.
Current Derating*
0
1
2
3
4
5
0 255075100125150
T
C
- Case Temperature (°C)
I
D
- Drain Current (A)
Power, Junction-to-Case
0.0
0.8
1.6
2.4
3.2
4.0
0 25 50 75 100 125 150
T
C
- Case Temperature (°C)
Power (W)
Power, Junction-to-Ambient
0.0
0.3
0.6
0.9
1.2
0 25 50 75 100 125 150
T
A
-Ambient Temperature (°C)
Power (W)
Document Number: 68806
S10-0547-Rev. C, 08-Mar-10
www.vishay.com
11
Vishay Siliconix
Si5513CDC
P-CHANNEL TYPICAL CHARACTERISTICS 25 °C, unless otherwise noted
Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon
Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and
reliability data, see www.vishay.com/ppg?68806
.
Normalized Thermal Transient Impedance, Junction-to-Ambient
10
-3
10
-2
1
10
100010
-1
10
-4
100
0.2
0.1
Square WavePulse Duration (s)
Normalized Effective Transient
Thermal Impedance
1
0.1
0.01
t
1
t
2
Notes:
P
DM
1. Duty Cycle, D =
2. Per Unit Base = R
thJA
=105 °C/W
3. T
JM
-T
A
=P
DM
Z
thJA
(t)
t
1
t
2
4. Surface Mounted
Duty Cycle = 0.5
Single Pulse
0.02
0.05
Normalized Thermal Transient Impedance, Junction-to-Foot
1
0.1
0.01
0.2
Duty Cycle = 0.5
Square WavePulse Duration (s)
Normalized Effective Transient
Thermal Impedance
10
-3
10
-2
110
-1
10
-4
0.05
0.02
Single Pulse
0.1
Package Information
Vishay Siliconix
Document Number: 71151
15-Jan-04
www.vishay.com
1
1206-8 ChipFETR
c
EE
1
e
D
A
6578
3421
4
L
5678
4321
4
S b
2X 0.10/0.13 R
Backside View
x
NOTES:
1. All dimensions are in millimeaters.
2. Mold gate burrs shall not exceed 0.13 mm per side.
3. Leadframe to molded body offset is horizontal and vertical shall not exceed
0.08 mm.
4. Dimensions exclusive of mold gate burrs.
5. No mold flash allowed on the top and bottom lead surface.
DETAIL X
C1
MILLIMETERS INCHES
Dim Min Nom Max Min Nom Max
A
1.00 1.10 0.039 0.043
b
0.25 0.30 0.35 0.010 0.012 0.014
c
0.1 0.15 0.20 0.004 0.006 0.008
c1
0 0.038 0 0.0015
D
2.95 3.05 3.10 0.116 0.120 0.122
E
1.825 1.90 1.975 0.072 0.075 0.078
E
1
1.55 1.65 1.70 0.061 0.065 0.067
e
0.65 BSC 0.0256 BSC
L
0.28 0.42 0.011 0.017
S
0.55 BSC 0.022 BSC
5_Nom 5_Nom
ECN: C-03528—Rev. F, 19-Jan-04
DWG: 5547

SI5513CDC-T1-GE3

Mfr. #:
Manufacturer:
Vishay / Siliconix
Description:
MOSFET 20V Vds 12V Vgs 1206-8 ChipFET
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
T/T Paypal Visa MoneyGram Western Union

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