FEDR45V100A-01
MR45V100A
16/21
TIMING DIAGRAMS
SERIAL INPUT TIMING
HOLD TIMING
OUTPUT TIMING
CS
#
SC
K
SO
SI
HOLD
#
t
CHHL
t
HLCH
t
HHCH
t
HHQX
t
CHHH
t
HLQ
Z
t
Q
L
Q
H
t
Q
H
Q
L
CS
#
SC
K
SO
SI
A
ddress, LSB IN
t
CH
t
CL
t
SHQ
Z
t
CLQV
t
CLQX
t
CLQX
t
CLQV
LSB OUT
t
RI
t
FI
CS#
t
CHSH
SCK
SI
SO
MSB IN LSB IN
High Impedance
t
SLCH
t
DVCH
t
CHDX
t
SLCH
t
CHSH
t
SHSL
FEDR45V100A-01
MR45V100A
17/21
POWER-ON and POWER-OFF CHARACTERISTICS
(Under recommended operating conditions)
Parameter Symbol Min. Max. Unit Note
Power-On CS# High Hold Time
t
VHEL
100 ns 1, 2
Power-Off CS# High Hold Time
t
EHVL
0 ns 1
Power-On Interval Time
t
VLVH
0 μs 2
Power-On time
t
R
30 μs/V
Power-Off time
t
F
30 μs/V
Notes:
1. To prevent an erroneous operation, be sure to maintain CS#="H", and set the FeRAM in an inactive state
(standby mode) before and after power-on and power-off.
2. Powering on at the intermediate voltage level will cause an erroneous operation; thus, be sure to power up
from 0 V.
3. Enter all signals at the same time as power-on or enter all signals after power-on.
Power-On and Power-Off Sequences
0
V
V
IL
Max.
V
CC
Min.
V
CC
V
IH
Min.
CS
#
0V
V
IL
Max.
V
CC
Min.
V
CC
V
IH
Min.
CS#
t
VHEL
t
VLVH
t
EHVL
t
R
t
F
FEDR45V100A-01
MR45V100A
18/21
READ/WRITE CYCLES and DATA RETENTION
(Under recommended operating conditions)
Parameter Min. Max. Unit Note
Read/Write Cycle
10
12
Cycle
Data Retention
10 Year
CAPACITANCE
V
CC
= 3.3V, V
IN
= V
OUT
= GND, f = 1MHz, and Ta = 25°C
Signal Symbol Min. Max. Unit Note
Input Capacitance
C
IN
10 pF 1
Input/Output Capacitance
C
OUT
10 pF 1
Note:
1. Sampling value.

MR45V100AMAZAATL

Mfr. #:
Manufacturer:
Description:
F-RAM FeRAM/1Mbit 128Kbx8 8pin SOP 34MHz
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
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