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SX1231J
WIRELESS & SENSING
DATASHEET
Rev 2 - April 2012
4.3. Transmitter Registers
Table 11 Transmitter Registers
Note *Power Amplifier truth table is available in Table 10.
Name
(Address)
Bits Variable Name Mode
Default
Value
Description
RegPaLevel
(0x11)
7 Pa0On * rw 1 Enables PA0, connected to RFIO and LNA
6 Pa1On * rw 0 Enables PA1, on PA_BOOST pin
5 Pa2On * rw 0 Enables PA2, on PA_BOOST pin
4-0 OutputPower rw 11111 Output power setting, with 1 dB steps
Pout = -18 + OutputPower [dBm] , with PA0 or PA1
Pout = -14 + OutputPower [dBm] , with PA1 and PA2
(limited to the 16 upper values of OutputPower)
RegPaRamp
(0x12)
7-4 - r 0000 unused
3-0 PaRamp rw 1001 Rise/Fall time of ramp up/down in FSK
0000 Æ 3.4 ms
0001 Æ 2 ms
0010 Æ 1 ms
0011 Æ 500 us
0100 Æ 250 us
0101 Æ 125 us
0110 Æ 100 us
0111 Æ 62 us
1000 Æ 50 us
1001 Æ 40 us
1010 Æ 31 us
1011 Æ 25 us
1100 Æ 20 us
1101 Æ 15 us
1110 Æ 12 us
1111 Æ 10 us
RegOcp
(0x13)
7-5 - r 000 unused
4 OcpOn rw 1 Enables overload current protection (OCP) for the PA:
0 Æ OCP disabled
1 Æ OCP enabled
3-0 OcpTrim rw 1010 Trimming of OCP current:
95 mA OCP by default
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SX1231J
WIRELESS & SENSING
DATASHEET
Rev 2 - April 2012
4.4. Receiver Registers
Table 12 Receiver Registers
Name
(Address)
Bits Variable Name Mode
Default
Value
Description
Reserved14
(0x14)
7-0 - r 0x40 unused
Reserved15
(0x15)
7-0 - r 0xB0 unused
Reserved16
(0x16)
7-0 - r 0x7B unused
Reserved17
(0x17)
7-0 - r 0x9B unused
RegLna
(0x18)
7 LnaZin rw 1
*
LNA’s input impedance
0 Æ 50 ohms
1 Æ 200 ohms
6 - r 0 unused
5-3 LnaCurrentGain r 001 Current LNA gain, set either manually, or by the AGC
2-0 LnaGainSelect rw 000 LNA gain setting:
000 Æ gain set by the internal AGC loop
001 Æ G1 = highest gain
010 Æ G2 = highest gain – 6 dB
011 Æ G3 = highest gain – 12 dB
100 Æ G4 = highest gain – 24 dB
101 Æ G5 = highest gain – 36 dB
110 Æ G6 = highest gain – 48 dB
111 Æ reserved
RegRxBw
(0x19)
7-5 DccFreq rw 010
*
Cut-off frequency of the DC offset canceller (DCC):
~4% of the RxBw by default
4-3 RxBwMant rw 10
*
Channel filter bandwidth control:
00 Æ RxBwMant = 16 10 Æ RxBwMant = 24
01 Æ RxBwMant = 20 11 Æ reserved
2-0 RxBwExp rw 101
*
Channel filter bandwidth control:
FSK Mode:
OOK Mode:
See Table 13 for tabulated values
RegAfcBw
(0x1A)
7-5 DccFreqAfc rw 100 DccFreq parameter used during the AFC
4-3 RxBwMantAfc rw 01 RxBwMant parameter used during the AFC
2-0 RxBwExpAfc rw 011 * RxBwExp parameter used during the AFC
fc
4 RxBw×
2π 2
DccFreq 2+
×
------------------------------------------
=
RxBw
FXOSC
RxBwMant 2
RxBwExp 2+
×
------------------------------------------------------------------
=
RxBw
FXOSC
RxBwMant 2
RxBwExp 3+
×
------------------------------------------------------------------
=
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SX1231J
WIRELESS & SENSING
DATASHEET
Rev 2 - April 2012
RegOokPeak
(0x1B)
7-6 OokThreshType rw 01 Selects type of threshold in the OOK data slicer:
00 Æ fixed 10 Æ average
01 Æ peak 11 Æ reserved
5-3 OokPeakTheshStep rw 000 Size of each decrement of the RSSI threshold in the OOK
demodulator:
000 Æ 0.5 dB 001 Æ 1.0 dB
010 Æ 1.5 dB 011 Æ 2.0 dB
100 Æ 3.0 dB 101 Æ 4.0 dB
110 Æ 5.0 dB 111 Æ 6.0 dB
2-0 OokPeakThreshDec rw 000 Period of decrement of the RSSI threshold in the OOK
demodulator:
000 Æ once per chip 001 Æ once every 2 chips
010 Æ once every 4 chips 011 Æ once every 8 chips
100 Æ twice in each chip 101 Æ 4 times in each chip
110 Æ 8 times in each chip 111 Æ 16 times in each chip
RegOokAvg
(0x1C)
7-6 OokAverageThreshFilt rw 10 Filter coefficients in average mode of the OOK
demodulator:
00 Æ f
C
chip rate / 32.π 01 Æ f
C
chip rate / 8.π
10 Æ f
C
chip rate / 4.π 11 Æf
C
chip rate / 2.π
5-0 - r 000000 unused
RegOokFix
(0x1D)
7-0 OokFixedThresh rw 0110
(6dB)
Fixed threshold value (in dB) in the OOK demodulator.
Used when OokThresType = 00
RegAfcFei
(0x1E)
7 - r 0 unused
6 FeiDone r 0 0 Æ FEI is on-going
1 Æ FEI finished
5 FeiStart w 0 Triggers a FEI measurement when set. Always reads 0.
4 AfcDone r 1 0 Æ AFC is on-going
1 Æ AFC has finished
3 AfcAutoclearOn rw 0 Only valid if AfcAutoOn is set
0 Æ AFC register is not cleared before a new AFC phase
1 Æ AFC register is cleared before a new AFC phase
2 AfcAutoOn rw 0 0 Æ AFC is performed each time AfcStart is set
1 Æ AFC is performed each time Rx mode is entered
1 AfcClear w 0 Clears the AfcValue if set in Rx mode. Always reads 0
0 AfcStart w 0 Triggers an AFC when set. Always reads 0.
RegAfcMsb
(0x1F)
7-0 AfcValue(15:8) r 0x00 MSB of the AfcValue, 2’s complement format
RegAfcLsb
(0x20)
7-0 AfcValue(7:0) r 0x00 LSB of the AfcValue, 2’s complement format
Frequency correction = AfcValue x Fstep
RegFeiMsb
(0x21)
7-0 FeiValue(15:8) r - MSB of the measured frequency offset, 2’s complement
RegFeiLsb
(0x22)
7-0 FeiValue(7:0) r - LSB of the measured frequency offset, 2’s complement
Frequency error = FeiValue x Fstep
RegRssiConfig
(0x23)
7-2 - r 000000 unused
1 RssiDone r 1 0 Æ RSSI is on-going
1 Æ RSSI sampling is finished, result available
0 RssiStart w 0 Trigger a RSSI measurement when set. Always reads 0.
RegRssiValue
(0x24)
7-0 RssiValue r 0xFF Absolute value of the RSSI in dBm, 0.5dB steps.
RSSI = -RssiValue/2 [dBm]

SX1231JIMLTRT

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Semtech
Description:
IC RF TXRX ISM<1GHZ 24VQFN
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