ICS8714004DKI REVISION A MARCH 24, 2014 4 ©2014 Integrated Device Technology, Inc.
ICS8714004I Data Sheet FemtoCLock
®
Zero Delay Buffer/Clock Generator for PCI Express™ and Ethernet
NOTE: Pullup and Pulldown refer to internal input resistors. See Table 2, Pin Characteristics, for typical values.
Table 2. Pin Characteristics
17 QDIV0 Input Pulldown
Output Divider Control for Q0, nQ0. Refer to Table 3F. LVCMOS/LVTTL interface
levels.
18 QDIV1 Input Pulldown
Output Divider Control for Q1, nQ1. Refer to Table 3F. LVCMOS/LVTTL interface
levels.
19 QDIV2 Input Pulldown
Output Divider Control for Q2, nQ2. Refer to Table 3F. LVCMOS/LVTTL interface
levels.
20 QDIV3 Input Pulldown
Output Divider Control for Q3, nQ3. Refer to Table 3F. LVCMOS/LVTTL interface
levels.
21 IREF Input
An external fixed precision resistor from this pin to ground is needed to provide a
reference current for the differential HCSL outputs. A resistor value of 475
provides an HCSL voltage swing of approximately 700mV.
23, 24
nFBOUT,
FBOUT
Output
Differential feedback output pair. The feedback output pair always switches
independent of the output enable settings on the OE[1:0] pins.
HCSL interface levels.
25, 26 nQ3, Q3 Output Differential output pair. HCSL interface levels.
28, 29 nQ2, Q2 Output Differential output pair. HCSL interface levels.
31, 32 nQ1, Q1 Output Differential output pair. HCSL interface levels.
33, 34 nQ0, Q0 Output Differential output pair. HCSL interface levels.
36 V
DDA
Power Analog supply pin.
37 CLK Input Pulldown
Non-inverting differential clock input.
Accepts HCSL, LVDS, M-LVDS, HSTL, LVPECL input levels.
38 nCLK Input
Pullup/
Pulldown
Inverting differential clock input.
Accepts HCSL, LVDS, M-LVDS, HSTL, LVPECL input levels.
39 PDIV0 Input Pulldown
Input Divide Select 0. Together with PDIV1 determines the input divider value.
Refer to Table 3E. LVCMOS/LVTTL Interface levels.
40 PDIV1 Input Pulldown
Input Divide Select 1. Together with PDIV0 determines the input divider value.
Refer to Table 3E. LVCMOS/LVTTL Interface levels.
Symbol Parameter Test Conditions Minimum Typical Maximum Units
C
IN
Input Capacitance 4pF
R
PULLUP
Input Pullup Resistor 51 k
R
PULLDOWN
Input Pulldown Resistor 51 k
Number Name Type Description