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82V3010PVG

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24P25-P27P28-P30P31-P31
IDT82V3010 T1/E1/OC3 Telecom Clock Generator with Dual Reference Inputs
DC Electrical Characteristics 19 November 14, 2012
6.2 DIFFERENTIAL OUTPUT PORT (LVDS)
Parameter Description Min. Typ. Max. Units Test Conditions
VOD
Differential Output Voltage 250 350 450 mV RL = 100
VOD
Change in Magnitude of VOD for
Complementary Output States
4 35 mV RL = 100
VOS Offset Voltage 1.125 1.25 1.375 V RL = 100
VOS
Change in Magnitude of VOS for
Complementary Output States
5 25 mV RL = 100
VOH Output Voltage High 1.38 1.6 V RL = 100
VOL Output Voltage Low 0.9 1.03 V RL = 100
t
TLH
Output Rise time 0.38 1.5 ns RL = 100
t
THL
Output Fall time 0.40 1.5 ns RL = 100
IOS Output Short Circuit Current 6.0 mA
IOSD Differential Output Short Circuit Current 6.0 10 mA
IDT82V3010 T1/E1/OC3 Telecom Clock Generator with Dual Reference Inputs
AC Electrical Characteristics 20 November 14, 2012
7 AC ELECTRICAL CHARACTERISTICS
7.1 PERFORMANCE
7.2 INTRINSIC JITTER UNFILTERED
Description Min. Typ. Max. Units
Test Conditions / Notes
(see “Notes” on page 25)
Freerun Mode accuracy with OSCi at: 0 ppm
-0 +0 ppm 5-9
Freerun Mode accuracy with OSCi at: ±32 ppm -32 +32 ppm 5-9
Freerun Mode accuracy with OSCi at: ±100 ppm -100 +100 ppm 5-9
Capture range with OSCi at: 0 ppm -230 +230 ppm 1-3, 6-9
Capture range with OSCi at: ±32 ppm -198 +198 ppm 1-3, 6-9
Capture range with OSCi at: ±100 ppm -130 +130 ppm 1-3, 6-9
Phase lock time 50 s 1-3, 6-15, 45
Output phase continuity with reference switch 200 ns 1-3, 6-15
Output phase continuity with mode switch to Normal 200 ns 1-2, 4-15
Output phase continuity with mode switch to Freerun 200 ns 1-4, 6-15
Output phase continuity with mode switch to Holdover 50 ns 1-3, 6-15
Fref0 Frequency accuracy when MON_out0 is logic low -12 +12 ppm
Fref1 Frequency accuracy when MON_out1 is logic low -12 +12 ppm
MTIE (maximum time interval error) 1µs 1-15, 28
Output phase slope 40 µs/s 1-15, 28
Reference input for Auto-Holdover with 8 kHz -18 k +18 k ppm 1-3, 6, 10-12
Reference input for Auto-Holdover with 1.544 MHz -36 k +36 k ppm 1-3, 7, 10-12
Reference input for Auto-Holdover with 2.048 MHz -36 k +36 k ppm 1-3, 8, 10-12
Reference input for Auto-Holdover with 19.44 MHz -36 k +36 k ppm 1-3, 9, 10-12
Description Min. Typ. Max. Units
Test Conditions / Notes
(see “Notes” on page 25)
Intrinsic jitter at F8o (8 kHz)
0.0001 UIpp 1-15, 22-25, 29
Intrinsic jitter at F0o (8 kHz) 0.0001 UIpp 1-15, 22-25, 29
Intrinsic jitter at F16o (8 kHz) 0.0001 UIpp 1-15, 22-25, 29
Intrinsic jitter at C1.5o (1.544 MHz) 0.015 UIpp 1-15, 22-25, 30
Intrinsic jitter at C3o (3.088 MHz) 0.03 UIpp 1-15, 22-25, 32
Intrinsic jitter at C2o (2.048 MHz) 0.01 UIpp 1-15, 22-25, 31
Intrinsic jitter at C6o (6.312 MHz) 0.06 UIpp 1-15, 22-25, 34
Intrinsic jitter at C4o (4.096 MHz) 0.02 UIpp 1-15, 22-25, 33
Intrinsic jitter at C8o (8.192 MHz) 0.04 UIpp 1-15, 22-25, 35
Intrinsic jitter at C16o (16.834 MHz) 0.04 UIpp 1-15, 22-25, 36
Intrinsic jitter at TSP (8 kHz) 0.0001 UIpp 1-15, 22-25, 29
Intrinsic jitter at RSP (8 kHz) 0.0001 UIpp 1-15, 22-25, 29
Intrinsic jitter at C32o (32.768 MHz) 0.08 UIpp 1-15, 22-25, 38
IDT82V3010 T1/E1/OC3 Telecom Clock Generator with Dual Reference Inputs
AC Electrical Characteristics 21 November 14, 2012
7.3 C1.5o (1.544 MHZ) INTRINSIC JITTER FILTERED
7.4 C2o (2.048 MHZ) INTRINSIC JITTER FILTERED
7.5 C19o (19.44 MHZ) INTRINSIC JITTER FILTERED
7.6 8 KHZ INPUT TO 8 KHZ OUTPUT JITTER TRANSFER
Description Min. Typ. Max. Units
Test Conditions / Notes
(see “Notes” on page 25)
Intrinsic jitter (4 Hz to 100 kHz filter)
0.008 UIpp 1-15, 22-25, 30
Intrinsic jitter (10 Hz to 40 kHz filter) 0.006 UIpp 1-15, 22-25, 30
Intrinsic jitter (8 kHz to 40 kHz filter) 0.006 UIpp 1-15, 22-25, 30
Intrinsic jitter (10 Hz to 8 kHz filter) 0.003 UIpp 1-15, 22-25, 30
Description Min. Typ. Max. Units
Test Conditions / Notes
(see “Notes” on page 25)
Intrinsic jitter (4 Hz to 100 kHz filter)
0.005 UIpp 1-15, 22-25, 31
Intrinsic jitter (10 Hz to 40 kHz filter) 0.004 UIpp 1-15, 22-25, 31
Intrinsic jitter (8 kHz to 40 kHz filter) 0.003 UIpp 1-15, 22-25, 31
Intrinsic jitter (10 Hz to 8 kHz filter) 0.002 UIpp 1-15, 22-25, 31
Description Min. Typ. Max. Units
Test Conditions / Notes
(see “Notes” on page 25)
Intrinsic jitter (500 Hz to 1.3 MHz filter)
0.4 0.5 nspp 1-15, 22-25, 37
Intrinsic jitter (65 kHz to 1.3 MHz filter) 0.2 0.3 nspp 1-15, 22-25, 37
Description Min. Typ. Max. Units
Test Conditions / Notes
(see “Notes” on page 25)
Jitter attenuation for 1 Hz@0.01 UIpp input
0 6 dB 1-3, 6, 10-15, 22-23, 25, 29, 39
Jitter attenuation for 1 Hz@0.54 UIpp input 6 16 dB 1-3, 6, 10-15, 22-23, 25, 29, 39
Jitter attenuation for 10 Hz@0.10 UIpp input 15 22 dB 1-3, 6, 10-15, 22-23, 25, 29, 39
Jitter attenuation for 60 Hz@0.10 UIpp input 32 38 dB 1-3, 6, 10-15, 22-23, 25, 29, 39
Jitter attenuation for 300 Hz@0.10 UIpp input 42 dB 1-3, 6, 10-15, 22-23, 25, 29, 39
Jitter attenuation for 3600 Hz@0.005 UIpp input 50 dB 1-3, 6, 10-15, 22-23, 25, 29, 39
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82V3010PVG

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Buy 82V3010PVG
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IDT
Description:
Clock Generators & Support Products T1/E1/OC3 WAN PLL
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New from this manufacturer.
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