Data Sheet HMC903LP3E
Rev. H | Page 5 of 13
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
HMC903LP3E
TOP VIEW
(Not to Scale)
NOTES
1. NIC = NOT INTERNALLY CONNECTED.
2. EXPOSED PAD. THE PACKAGE BOTTOM HAS
AN EXPOSED METAL GROUND PADDLE
THAT MUST CONNECT TO RF/DC GROUND.
PACKAGE
BASE
GND
1
2
3
4
NIC
GND
RFIN
NIC
NIC
GND
RFOUT
NIC
12
11
10
9
NIC
V
DD1
V
DD2
NIC
16
15
14
13
NIC
V
GG1
V
GG2
NIC
5
6
7
8
14479-002
Figure 2. Pin Configuration
Table 5. Pin Function Descriptions
Pin No. Mnemonic Description
1, 4, 5, 8, 9,
12, 13, 16
NIC
Not Internally Connected. However, all data shown was measured with these pins connected to RF/dc ground
externally.
Ground. Connect these pins to RF/dc ground. See Figure 3 for the interface schematic.
3 RFIN RF Input. This pin is ac-coupled and matched to 50 Ω. See Figure 4 for the interface schematic.
6, 7 V
GG1
, V
GG2
Optional Gate Controls for the Amplifier. If left open, the amplifier runs self biased at the standard current.
Applying a negative voltage reduces the drain current. External capacitors are required (see Figure 24). See
Figure 5 for the interface schematic.
RF Output. This pin is ac-coupled and matched to 50 Ω. See Figure 6 for the interface schematic.
14, 15 V
DD1
, V
DD2
Power Supply Voltages for the Amplifier. See assembly for the required external components (see Figure 23
and Figure 24). See Figure 7 for the interface schematic.
EPAD Exposed Pad. The package bottom has an exposed metal ground paddle that must connect to RF/dc ground.
INTERFACE SCHEMATICS
Figure 3. GND Interface Schematic
Figure 4. RFIN Interface Schematic
Figure 5. V
GG1
and V
GG2
Interface Schematic
Figure 6. RFOUT Interface Schematic
Figure 7. V
DD1
and V
DD2
Interface Schematic
