L6205
12/21
APPLICATION INFORMATION
A typical application using L6205 is shown in Fig. 11. Typical component values for the application are shown
in Table 2. A high quality ceramic capacitor in the range of 100 to 200 nF should be placed between the power
pins (VS
A
and VS
B
) and ground near the L6205 to improve the high frequency filtering on the power supply and
reduce high frequency transients generated by the switching. The capacitors connected from the EN
A
and EN
B
inputs to ground set the shut down time for the Brgidge A and Bridge B respectively when an over current is
detected (see Overcurrent Protection). The two current sources (SENSE
A
and SENSE
B
) should be connected
to Power Ground with a trace length as short as possible in the layout. To increase noise immunity, unused logic
pins (except EN
A
and EN
B
) are best connected to 5V (High Logic Level) or GND (Low Logic Level) (see pin
description). It is recommended to keep Power Ground and Signal Ground separated on PCB.
Table 2. Component Values for Typical Application
Figure 11. Typical Application
C
1
100uF D
1
1N4148
C
2
100nF D
2
1N4148
C
BOOT
220nF R
ENA
100kΩ
C
P
10nF R
ENB
100kΩ
C
ENA
5.6nF R
P
100Ω
C
ENB
5.6nF
OUT1
A
4
18
16
157
13
OUT2
A
GND
GND
GND
GND
OUT2
B
OUT1
B
VS
A
POWER
GROUND
SIGNAL
GROUND
+
-
VS
8-52V
DC
VS
B
VCP
VBOOT
C
1
SENSE
A
17
6
5
EN
B
C
ENB
R
ENB
ENABLE
B
11
14
3
12
19
SENSE
B
LOAD
A
LOAD
B
8
EN
A
C
ENA
R
ENA
ENABLE
A
20
D02IN1345
1
IN1
A
IN2
A
IN1
A
IN2
A
2
IN2
B
10
IN1
B
IN2
B
IN1
B
9
C
P
C
BOOT
R
P
D
2
D
1
C
2
