29
LTC4230
4230f
Figure 20. Placing Transient Protection
Devices Close to the LTC4230
+
4
3
2 1
V
CC
n
SENSE
n
LTC4230*
1214
C
LOAD
n
V
OUT
4230 F20
15
R2
GATE
n
GND TIMER
C
TIMER
FB
n
ON ON
RESET
n
10Ω
V
IN
R
SENSE
0.007Ω
Q
n
Si4410DY
R1
RESET
0.1µF
SMAJ10
*ADDITIONAL DETAILS
OMITTED FOR CLARITY
The opposite is true for LTC4230 Hot Swap circuits
mounted on plug-in cards. In most cases, there is no
supply bypass capacitor present on the powered supply
voltage side of the MOSFET switch. An abrupt connection,
produced by inserting the board into a backplane connec-
tor, results in a fast rising edge applied on the supply line
of the LTC4230.
Since there is no bulk capacitance to damp the parasitic
track inductance, supply voltage transients excite
parasitic resonant circuits formed by the power MOSFET
capacitance and the combined parasitic inductance from
the wiring harness, the backplane and the circuit board
traces. These ringing transients appear as a fast edge on
the input supply line, exhibiting a peak overshoot to 2.5
times the steady-state value. This peak is followed by a
damped sinusoidal response whose duration and period
are dependent on the resonant circuit parameters. Since
the absolute maximum supply voltage of the LTC4230 is
17V, transient protection against V
CC
> 16.8V supply
voltage spikes and ringing is highly recommended.
I
n these applications, there are two methods for eliminat-
ing these supply voltage transients: using zener diodes to
clip the transient to a safe level and snubber networks.
Snubber networks are series RC networks whose time
constants are experimentally determined based on the
board’s parasitic resonance circuits. As a starting point,
the capacitors in these networks are chosen to be 10× to
100× the power MOSFET’s C
OSS
under bias. The series
resistor is a value determined experimentally and ranges
from 1Ω to 50Ω, depending on the parasitic resonance
circuit. Note that in all LTC4230 circuit schematics,
TransZorb
®
diodes and snubber networks have been
added to each 3.3V and 5V supply rail. These protection
networks should be mounted very close to the LTC4230’s
supply voltage using short lead lengths to minimize lead
inductance. This is shown schematically in Figure 20, and
a recommended layout of the transient protection devices
around the LTC4230 is shown in Figure 21.
ADDITIONAL SUPPLY OVERVOLTAGE
DETECTION/PROTECTION
In addition to using external protection devices around the
LTC4230 for large scale transient protection, low power
zener diodes can be used with the LTC4230’s FILTER pin
to act as a supply overvoltage detection/protection circuit
on either the high side (input) or low side (output) of the
external pass transistor. Recall that internal control cir-
cuitry keeps the LTC4230 GATE
n
voltage from ramping up
if V
FILTER
> 1.26V, or when an external fault condition
(V
FAULT
< 1.234V) causes FAULT to be asserted low.
High Side (Input) Overvoltage Protection
As shown in Figure 22, a low power zener diode can be
used to sense an overvoltage condition on the input
(high) side of the main 5V supply. In this example, a low
APPLICATIO S I FOR ATIO
WUU
U
V
CC2
4230 F21
NOTE: DRAWING IS NOT TO SCALE!
USE SIMILAR TECHNIQUES FOR V
CC1
AND V
CC3
*ADDITIONAL DETAILS OMITTED FOR CLARITY
SNUBBER
NETWORK
VIAS TO
GND PLANE
C
X
R
X
Z
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
V
CC2
ON
GND
LTC4230*
Figure 21. Recommended Layout
for Transient Protection Devices
TransZorb is a registered trademark of General Instruments, GSI.
