7
LTC4230
4230f
TYPICAL PERFOR A CE CHARACTERISTICS
UW
V
CC1
SUPPLY VOLTAGE (V)
0
2 4 6 8 10 12 14 16 18
TIMER LOW THRESHOLD (V)
4230 G28
0.32
0.31
0.30
0.29
0.28
–40°C
85°C
25°C
V
CC1
SUPPLY VOLTAGE (V)
0
2 4 6 8 10 12 14 16 18
V
OL
VOLTAGE (V)
4230 G29
0.25
0.20
0.15
0.10
0.05
0
TEMPERATURE (°C)
V
OL
VOLTAGE (V)
4230 G30
0.25
0.22
0.19
0.16
0.13
0.10
75 125
–25
25
75
50 150
0
50
100
V
CC1
SUPPLY VOLTAGE (V)
0
2 4 6 8 10 12 14 16 18
FAST COMPARATOR RESPONSE TIME (µs)
4230 G31
650
600
550
500
450
400
350
300
–40°C
85°C
25°C
V
CC1
SUPPLY VOLTAGE (V)
0
2 4 6 8 10 12 14 16 18
SLOW COMPARATOR RESPONSE TIME (µs)
4230 G32
14
13
12
11
10
9
8
7
6
–40°C
85°C25°C
V
CC1
SUPPLY VOLTAGE (V)
0
2 4 6 8 10 12 14 16 18
FILTER COMPARATOR RESPONSE TIME (µs)
4230 G33
10
9
8
7
6
–40°C
85°C
25°C
V
CC1
SUPPLY VOLTAGE (V)
0
2 4 6 8 10 12 14 16 18
FAULT LOW TO GATE
n
DISCHARGING (µs)
4230 G34
5
4
3
2
1
0
–40°C
85°C
25°C
V
CC1
SUPPLY VOLTAGE (V)
0
2 4 6 8 10 12 14 16 18
CIRCUIT BREAKER RESET TIME (µs)
4230 G35
20
18
16
14
12
10
–40°C
85°C
25°C
V
CC1
SUPPLY VOLTAGE (V)
0
2 4 6 8 10 12 14 16 18
TURN-OFF TIME (µs)
4230 G36
11
10
9
8
7
6
5
–40°C
85°C
25°C
TIMER Low Threshold vs V
CC1
Supply Voltage
Fast Comparator Response Time
vs V
CC1
Supply Voltage
FAULT Low to GATE
n
Discharging
vs V
CC1
Supply Voltage
V
OL
(RESET
n
, FAULT) vs V
CC1
Supply Voltage
Slow Comparator Response Time
(FILTER Floating) vs V
CC1
Supply
Voltage
FILTER Comparator Response
Time vs V
CC1
Supply Voltage
Circuit Breaker Reset Time vs
V
CC1
Supply Voltage
Turn-Off Time vs V
CC1
Supply
Voltage
V
OL
(RESET
n
, FAULT) vs
Temperture
8
LTC4230
4230f
FB3 (Pin 1): The FB3 (Feedback) pin is an input to the
FBCOMP3 comparator which monitors the V
CC3
output
supply voltage through an external resistor divider. If V
FB3
< 1.234V, RESET 3 pin pulls low. An internal glitch filter at
FBCOMP3’s output prevents triggering a reset condition
due to negative voltage transients. If V
FB3
> 1.237V,
RESET 3 pin goes high after exiting undervoltage lockout.
RESET 3 (Pin 2): An open-drain N-channel device whose
source connects to GND (Pin 14). This pin pulls low if the
voltage at FB3 (Pin 1) falls below the FB3 threshold
(1.234V). This pin requires an external pull-up resistor to
V
OUT3
. If an undervoltage lockout condition occurs,
RESET␣ 3 pulls low independently of FB3 to prevent false
glitches.
GATE 3 (Pin 3): The output signal at this pin is the high side
gate drive for Channel 3’s external N-channel MOSFET
pass transistor. An internal charge pump produces a 4.5V
(minimum) to 18V (maximum) gate drive voltage for V
CC1
supply voltages from 2.7V to 16.5V, respectively.
As shown in the Block Diagram for each channel, an
internal charge pump supplies a 10µA gate current and
sufficient gate voltage drive to the external MOSFET. The
internal charge pump produces a minimum 4.5V gate
drive for V
CC1
< 4.75V. For V
CC1
> 4.75V, the minimum
gate voltage drive is 9V. For V
CC1
12V, the minimum gate
voltage drive is 7V which is set by an internal zener diode
clamp connected between the GATE 3 pin and GND.
SENSE 3 (Pin 4): Circuit Breaker Sense Pin for Channel 3.
With a sense resistor placed in the power path between
V
CC3
and SENSE 3, Channel 3’s electronic circuit breaker
trips if the voltage across the sense resistor (V
CC3
V
SENSE3
) exceeds the thresholds set internally for SLOW
COMP3 and FAST COMP3, as shown in the Block Diagram.
The threshold for SLOW COMP3 is V
CB(SLOW)
= 50mV, and
the electronic circuit breaker trips if the voltage across
R
SENSE3
exceeds 50mV for 10µs, or for the time delay
programmed by C
FILTER
. To adjust SLOW COMP3’s delay,
please refer to the section on Adjusting SLOW COMP
n
’s
Response Time.
Under transient conditions where large step current
changes can and do occur over shorter periods of time, a
PI FU CTIO S
UUU
second (fast) comparator instead trips the electronic
circuit breaker. The threshold for FAST COMP3 is set at
V
CB(FAST)
= 150mV, and the circuit breaker trips if the
voltage across the R
SENSE3
exceeds 150mV for more than
500ns. FAST COMP3’s delay is fixed in the LTC4230 and
cannot be adjusted. To disable Channel 3’s electronic
circuit breaker, connect the V
CC3
and SENSE 3 pins
together.
V
CC3
(Pin 5): Positive Supply Input for Channel 3. V
CC3
operates from 1.7V to 15.5V (V
CC3
V
CC1
– 1V) and its
supply current, I
CC3
, is typically 65µA. The master UVLO
circuit disables all three GATE
n
outputs of the LTC4230
until the voltage at V
CC3
exceeds 1.19V.
V
CC1
(Pin 6): This is the positive supply input to the
LTC4230, the power supply input for Channel 1, and the
power supply input for all three internal charge pumps.
The LTC4230 operates from 2.7V to 16.5V, and the I
CC1
supply current is typically 1.8mA. The master UVLO circuit
disables all three GATE
n
outputs of the LTC4230 if V
CC1
is
less than 2.35V. The internal charge pump outputs are
enabled when V
CC1
> 2.35V, V
CC2
> 2.15V, and
V
CC3
> 1.19V.
SENSE 1 (Pin 7): Circuit Breaker Sense Pin for Channel 1.
With a sense resistor placed in the power path between
V
CC1
and SENSE 1, Channel 1’s electronic circuit breaker
trips if the voltage across the sense resistor (V
CC1
V
SENSE1
) exceeds the thresholds set internally for SLOW
COMP1 and FAST COMP1, as shown in the Block Diagram.
The threshold for SLOW COMP1 is V
CB(SLOW)
= 50mV, and
the electronic circuit breaker trips if the voltage across
R
SENSE1
exceeds 50mV for 10µs, or for the time delay
programmed by C
FILTER
. To adjust SLOW COMP1’s delay,
please refer to the section on Adjusting SLOW COMP
n
’s
Response Time.
Under transient conditions where large step current changes
can and do occur over shorter periods of time, a second
(fast) comparator instead trips the electronic circuit breaker.
The threshold for FAST COMP1 is set at V
CB(FAST)
= 150mV,
and the circuit breaker trips if the voltage across the
R
SENSE1
exceeds 150mV for more than 500ns. FAST
COMP1’s delay is fixed in the LTC4230 and cannot be
adjusted. To disable Channel 1’s electronic circuit breaker,
connect the V
CC1
and SENSE 1 pins together.
9
LTC4230
4230f
PI FU CTIO S
UUU
GATE 1 (Pin 8): The output signal at this pin is the high side
gate drive for Channel 1’s external N-channel FET pass
transistor. An internal charge pump produces a 4.5V
(minimum) to 18V (maximum) gate drive voltage for
supplies in the range of 2.7V V
CC1
16.5V, respectively.
As shown in the Block Diagram, each channel’s internal
charge pump is powered by V
CC1
and supplies a 10µA gate
current and sufficient gate voltage drive to the external
FET. The internal charge pump produces a minimum 4.5V
gate voltage drive for V
CC1
< 4.75V. For V
CC1
> 4.75V, the
minimum gate voltage drive is 9V. For V
CC1
12V, the
minimum gate voltage drive is 7V which is set by an
internal zener diode clamp connected between the GATE 1
pin and GND.
RESET 1 (Pin 9): An open-drain N-channel device whose
source connects to GND (Pin 14). This pin pulls low if the
voltage at FB1 (Pin 10) falls below the FB1 threshold
(1.234V). During the start-up cycle, RESET 1 goes high
impedance at the end of the second timing cycle after FB1
goes above the FB1 threshold. This pin requires an exter-
nal pull-up resistor to V
OUT1
. If an undervoltage lockout
condition occurs, RESET 1 pulls low independently of FB1
to prevent false glitches.
FB1 (Pin 10): The FB1 (Feedback) pin is an input to the
FBCOMP1 comparator which monitors the V
CC1
output
supply voltage through an external resistor divider. If V
FB1
< 1.234V, RESET 1 pin pulls low. An internal glitch filter at
FBCOMP3’s output prevents triggering a reset condition
due to negative voltage transients. If V
FB1
> 1.237V after
the second timing cycle, RESET 1 goes high.
FILTER (Pin 11): Overcurrent Fault Timing Pin and Over-
voltage Fault Set Pin. With a capacitor connected from this
pin to ground, the response time of all three SLOW COMP
comparators can be adjusted. Note that the response time
of the SLOW COMP comparators cannot be adjusted
individually.
TIMER (Pin 12): A capacitor connected from this pin to
GND sets the LTC4230’s system timing. The LTC4230’s
initial and second start-up timing cycles and its discharge
mode delay time are controlled by this capacitor.
FAULT (Pin 13): FAULT is a dual function (an input and an
output) internal to the LTC4230. Connected to this pin are
an analog comparator (COMP6) and an open-drain
N-channel FET. During normal operation, if COMP6 is
driven below 1.234V, all electronic circuit breakers trip
and each GATE pin pulls low. Referring to the Block
Diagram, FAULT incorporates an internal 2µA current
source pull up. This allows the LTC4230 to begin a second
timing cycle (V
FAULT
> 1.284V) and start up properly. This
also allows the use of the FAULT pin as a status output.
Under normal operating conditions, the FAULT output is a
logic high. Two conditions cause an active low on FAULT:
1) the LTC4230’s electronic circuit breakers trip because
of an output short circuit (V
OUT
n
= 0V) or because of a fast
output overcurrent transient (FAST COMP
n
trips its circuit
breaker); or 2) V
FILTER
> 1.26V. The FAULT output is driven
to logic low and is latched logic low until the ON pin is
driven to logic low for 30µs (the t
RESET
duration).
GND (Pin 14): Device Ground Connection. Connect this
pin to the system’s analog ground plane.
ON (Pin 15): An active high signal used to enable or disable
LTC4230 operation. As shown in the LTC4230 Block
Diagram, COMP1’s threshold is set at 1.234V and its
hysteresis is set at 80mV. If a logic high signal is applied
to the ON pin (V
ON
> 1.314V), the first timing cycle begins
if an overvoltage condition does not exist on any of the
GATE
n
pins (Pins 3, 8, and 18). If a logic low signal is
applied to the ON pin (V
ON
< 1.234V), each GATE
n
pin is
pulled low by an internal, dedicated 200µA current sink.
The ON pin can also be used to reset all three electronic
circuit breakers. If the ON pin is cycled low for more than␣ 1
t
RESET
n
(MAX)
period and then high following a circuit
breaker trip, all internal circuit breakers are reset and the
LTC4230 begins a new start-up cycle.
V
CC2
(Pin 16): Positive Supply Input for Channel 2. V
CC2
operates from 2.375V to 16.5V and its supply current,
I
CC2
, is typically 75µA. The master UVLO circuit disables
all three GATE
n
outputs of the LTC4230 until the voltage
at V
CC2
exceeds 2.15V.

LTC4230CGN

Mfr. #:
Manufacturer:
Analog Devices / Linear Technology
Description:
Hot Swap Voltage Controllers LTC4230 - Triple Hot Swap Controller with Multifunction Current Control
Lifecycle:
New from this manufacturer.
Delivery:
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