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P89C660HBA/00,512

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24P25-P27P28-P30P31-P33P34-P36P37-P39P40-P42P43-P45P46-P48P49-P51P52-P54P55-P57P58-P60P61-P63P64-P66P67-P69P70-P72P73-P75P76-P78P79-P81P82-P84P85-P87P88-P89
Philips Semiconductors Product data
P89C660/P89C662/P89C664/
P89C668
80C51 8-bit Flash microcontroller family
16KB/32KB/64KB ISP/IAP Flash with 512B/1KB/2KB/8KB RAM
2002 Oct 28
25
Table 4. Master Transmitter mode
STATUS
STATUS OF THE
APPLICATION SOFTWARE RESPONSE
STATUS
CODE
(S1STA)
STATUS
OF
THE
I
2
C BUS AND
SIO1 HARDWARE
TO/FROM S1DAT
TO S1CON
NEXT ACTION TAKEN BY SIO1 HARDWARE
(S1STA) SIO1 HARDWARE
TO/FROM
S1DAT
STA STO SI AA
08H A START condition has
been transmitted
Load SLA+W X 0 0 X SLA+W will be transmitted;
ACK bit will be received
10H A repeated START
diti h b
Load SLA+W or X 0 0 X As above
condition has been
transmitted
Load SLA+R X 0 0 X SLA+W will be transmitted;
SIO1 will be switched to MST/REC mode
18H SLA+W has been
transmitted; ACK has
bid
Load data byte or 0 0 0 X Data byte will be transmitted;
ACK bit will be received
been received
no S1DAT action or 1 0 0 X Repeated START will be transmitted;
no S1DAT action or 0 1 0 X STOP condition will be transmitted;
STO flag will be reset
no S1DAT action 1 1 0 X STOP condition followed by a
START condition will be transmitted;
STO flag will be reset
20H SLA+W has been
transmitted; NOT ACK
hb id
Load data byte or 0 0 0 X Data byte will be transmitted;
ACK bit will be received
has been received
no S1DAT action or 1 0 0 X Repeated START will be transmitted;
no S1DAT action or 0 1 0 X STOP condition will be transmitted;
STO flag will be reset
no S1DAT action 1 1 0 X STOP condition followed by a
START condition will be transmitted;
STO flag will be reset
28H Data byte in S1DAT has
been transmitted; ACK
hb id
Load data byte or 0 0 0 X Data byte will be transmitted;
ACK bit will be received
has been received
no S1DAT action or 1 0 0 X Repeated START will be transmitted;
no S1DAT action or 0 1 0 X STOP condition will be transmitted;
STO flag will be reset
no S1DAT action 1 1 0 X STOP condition followed by a
START condition will be transmitted;
STO flag will be reset
30H Data byte in S1DAT has
been transmitted; NOT
ACK h b i d
Load data byte or 0 0 0 X Data byte will be transmitted;
ACK bit will be received
ACK has been received
no S1DAT action or 1 0 0 X Repeated START will be transmitted;
no S1DAT action or 0 1 0 X STOP condition will be transmitted;
STO flag will be reset
no S1DAT action 1 1 0 X STOP condition followed by a
START condition will be transmitted;
STO flag will be reset
38H Arbitration lost in
SLA+R/W or
Db
No S1DAT action or 0 0 0 X I
2
C bus will be released;
not addressed slave will be entered
Data bytes
No S1DAT action 1 0 0 X A START condition will be transmitted when the
bus becomes free
Philips Semiconductors Product data
P89C660/P89C662/P89C664/
P89C668
80C51 8-bit Flash microcontroller family
16KB/32KB/64KB ISP/IAP Flash with 512B/1KB/2KB/8KB RAM
2002 Oct 28
26
Table 5. Master Receiver Mode
STATUS OF THE I
2
C
APPLICATION SOFTWARE RESPONSE
CODE
STATUS
OF
THE
I
2
C
BUS AND
SIO1 HARDWARE
TO/FROM S1DAT
TO S1CON
NEXT ACTION TAKEN BY SIO1 HARDWARE
(S1STA) SIO1 HARDWARE
TO/FROM
S1DAT
STA STO SI AA
08H A START condition has
been transmitted
Load SLA+R X 0 0 X SLA+R will be transmitted;
ACK bit will be received
10H A repeated START
diti h b
Load SLA+R or X 0 0 X As above
condition has been
transmitted
Load SLA+W X 0 0 X SLA+W will be transmitted;
SIO1 will be switched to MST/TRX mode
38H Arbitration lost in
NOT ACK bit
No S1DAT action or 0 0 0 X I
2
C bus will be released;
SIO1 will enter a Slave mode
No S1DAT action 1 0 0 X A START condition will be transmitted when the
bus becomes free
40H SLA+R has been
transmitted; ACK has
bid
No S1DAT action or 0 0 0 0 Data byte will be received;
NOT ACK bit will be returned
been received
no S1DAT action 0 0 0 1 Data byte will be received;
ACK bit will be returned
48H SLA+R has been
t itt d NOT ACK
No S1DAT action or 1 0 0 X Repeated START condition will be transmitted
transmitted; NOT ACK
has been received
no S1DAT action or 0 1 0 X STOP condition will be transmitted;
STO flag will be reset
no S1DAT action 1 1 0 X STOP condition followed by a
START condition will be transmitted;
STO flag will be reset
50H Data byte has been
received; ACK has been
d
Read data byte or 0 0 0 0 Data byte will be received;
NOT ACK bit will be returned
returned
read data byte 0 0 0 1 Data byte will be received;
ACK bit will be returned
58H Data byte has been
i d NOT ACK h
Read data byte or 1 0 0 X Repeated START condition will be transmitted
received; NOT ACK has
been returned
read data byte or 0 1 0 X STOP condition will be transmitted;
STO flag will be reset
read data byte 1 1 0 X STOP condition followed by a
START condition will be transmitted;
STO flag will be reset
Philips Semiconductors Product data
P89C660/P89C662/P89C664/
P89C668
80C51 8-bit Flash microcontroller family
16KB/32KB/64KB ISP/IAP Flash with 512B/1KB/2KB/8KB RAM
2002 Oct 28
27
Table 6. Slave Receiver mode
STATUS
STATUS OF THE
APPLICATION SOFTWARE RESPONSE
STATUS
CODE
(S1STA)
STATUS
OF
THE
I
2
C BUS AND
SIO1 HARDWARE
TO/FROM S1DAT
TO S1CON
NEXT ACTION TAKEN BY SIO1 HARDWARE
(S1STA) SIO1 HARDWARE
TO/FROM
S1DAT
STA STO SI AA
60H Own SLA+W has
been received; ACK
hb d
No S1DAT action or X 0 0 0 Data byte will be received and NOT ACK will be
returned
has been returned
no S1DAT action X 0 0 1 Data byte will be received and ACK will be returned
68H Arbitration lost in
SLA+R/W as master;
Own SLA+W has
b i d ACK
No S1DAT action or X 0 0 0 Data byte will be received and NOT ACK will be
returned
been received, ACK
returned
no S1DAT action X 0 0 1 Data byte will be received and ACK will be returned
70H General call address
(00H) has been
received
;
ACK has
No S1DAT action or X 0 0 0 Data byte will be received and NOT ACK will be
returned
received
ACK
has
been returned
no S1DAT action X 0 0 1 Data byte will be received and ACK will be returned
78H Arbitration lost in
SLA+R/W as master;
General call address
has been received
No S1DAT action or X 0 0 0 Data byte will be received and NOT ACK will be
returned
has
been
received
,
ACK has been
returned
no S1DAT action X 0 0 1 Data byte will be received and ACK will be returned
80H Previously addressed
with own SLV
address; DATA has
b i d ACK
Read data byte or X 0 0 0 Data byte will be received and NOT ACK will be
returned
been received; ACK
has been returned
read data byte X 0 0 1 Data byte will be received and ACK will be returned
88H Previously addressed
with own SLA; DATA
bhb
Read data byte or 0 0 0 0 Switched to not addressed SLV mode; no recognition
of own SLA or General call address
byte has been
received; NOT ACK
has been returned
read data byte or 0 0 0 1 Switched to not addressed SLV mode; Own SLA will
be recognized; General call address will be
recognized if S1ADR.0 = logic 1
read data byte or 1 0 0 0 Switched to not addressed SLV mode; no recognition
of own SLA or General call address. A START
condition will be transmitted when the bus becomes
free
read data byte 1 0 0 1 Switched to not addressed SLV mode; Own SLA will
be recognized; General call address will be
recognized if S1ADR.0 = logic 1. A START condition
will be transmitted when the bus becomes free.
90H Previously addressed
with General Call;
DATA byte has been
i d ACK h
Read data byte or X 0 0 0 Data byte will be received and NOT ACK will be
returned
received; ACK has
been returned
read data byte X 0 0 1 Data byte will be received and ACK will be returned
98H Previously addressed
with General Call;
DATA b h b
Read data byte or 0 0 0 0 Switched to not addressed SLV mode; no recognition
of own SLA or General call address
DATA byte has been
received; NOT ACK
has been returned
read data byte or 0 0 0 1 Switched to not addressed SLV mode; Own SLA will
be recognized; General call address will be
recognized if S1ADR.0 = logic 1
read data byte or 1 0 0 0 Switched to not addressed SLV mode; no recognition
of own SLA or General call address. A START
condition will be transmitted when the bus becomes
free
read data byte 1 0 0 1 Switched to not addressed SLV mode; Own SLA will
be recognized; General call address will be
recognized if S1ADR.0 = logic 1. A START condition
will be transmitted when the bus becomes free.
P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24P25-P27P28-P30P31-P33P34-P36P37-P39P40-P42P43-P45P46-P48P49-P51P52-P54P55-P57P58-P60P61-P63P64-P66P67-P69P70-P72P73-P75P76-P78P79-P81P82-P84P85-P87P88-P89

P89C660HBA/00,512

Mfr. #:
Buy P89C660HBA/00,512
Manufacturer:
NXP Semiconductors
Description:
IC MCU 8BIT 16KB FLASH 44PLCC
Lifecycle:
New from this manufacturer.
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