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VND1NV04-E
P1-P3
P4-P6
P7-P9
P10-P12
P13-P15
P16-P18
P19-P21
P22-P24
P25-P27
P28-P30
P31-P33
VND1NV04 -
VNN1NV04 -
VNS1NV04
Packag
e and PCB ther
mal data
Doc I
D 7381 R
ev 4
1
9/33
T
able 5.
DP
AK thermal parameter
4.2
SOT
-
223 thermal dat
a
Figure 34.
SOT
-223
PC board
1.
Layout condition of R
th
and Z
th
measurements (PCB FR4 area = 58 mm x 58 mm,PCB thickness = 2 mm,
Cu thickness=35 µm , Copper areas: from
minimum pad layout to 0.8
cm
2
).
Area/island
(cm
2
)0
.
2
5
6
R1 (°C/W)
0.8
R2 (°C/W)
1.6
R3 (°C/W)
0.8
R4 (°C/W)
2
R5 (°C/W)
15
R6 (°C/W)
61
24
C1 (W·
s/°C)
0.00006
C2 (W·
s/°C)
0.0005
C3 (W·
s/°C)
0.01
C4 (W·
s/°C)
0.3
C5 (W·
s/°C)
0.45
C6 (W·
s/°C)
0.8
5
.
Package
and PCB ther
mal data
VND1NV04 - V
NN1NV04 - VNS
1NV04
20/33
Doc ID 738
1 Rev 4
Figure 35.
SOT
-223 R
thj-
amb
vs. PCB copper area in open box fre
e air condition
Figure 36.
SOT
-223 thermal impedance junction ambient single pulse
60
70
80
90
100
110
120
130
140
0
0
,5
1
1
,5
2
2
,5
P
C
B
C
u
h
e
at
s
i
n
k area
(
c
m
^
2)
-
(
ref
er t
o
PC
B
l
a
y
o
u
t
)
foot
print
0,1
1
10
100
1000
0,0001
0,
001
0,
01
0,
1
1
10
100
1000
Ti
me
(
s)
ZT
H
(
°
C
/
W
)
Footprint
2 cm
2
VND1NV04 - VNN1N
V04 - VNS1NV04
Package and PCB thermal data
Doc I
D 7381 R
ev 4
2
1/33
Equation 2: P
ulse cal
culation
formula
where
δ
= t
P
/T
Figure 37.
SOT
-223 thermal fitti
ng model of a single
channel
T
able 6.
SOT
-223 ther
mal parameter
Area/island
(cm
2
)F
P
2
R1 (°C/W)
0.8
R2 (°C/W)
1.6
R3 (°C/W)
4.5
R4 (°C/W)
24
R5 (°C/W)
0.1
R6 (°C/W)
100
45
C1 (W·
s/°C)
0.00006
C2 (W·
s/°C)
0.0005
C3 (W·
s/°C)
0.03
C4 (W·
s/°C)
0.16
C5 (W·
s/°C)
1000
C6 (W·
s/°C)
0.5
2
Z
TH
δ
R
TH
δ
Z
THtp
1
δ
–
()
+
⋅
=
P1-P3
P4-P6
P7-P9
P10-P12
P13-P15
P16-P18
P19-P21
P22-P24
P25-P27
P28-P30
P31-P33
VND1NV04-E
Mfr. #:
Buy VND1NV04-E
Manufacturer:
STMicroelectronics
Description:
Gate Drivers OMNIFETII FULLY AUTO PROTECT Pwr MOSFET
Lifecycle:
New from this manufacturer.
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