HEF4516B All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved.
Product data sheet Rev. 7 — 11 November 2011 4 of 17
NXP Semiconductors
HEF4516B
Binary up/down counter
5. Pinning information
5.1 Pinning
5.2 Pin description
Fig 3. Pin configuration
HEF4516B
PL V
DD
Q3 CP
D3 Q2
D0 D2
CE D1
Q0 Q1
TC UP/DN
V
SS
MR
001aae689
1
2
3
4
5
6
7
8
10
9
12
11
14
13
16
15
Table 2. Pin description
Symbol Pin Description
PL 1 parallel load input (active HIGH)
D0 to D3 4, 12, 13, 3 parallel input
CE
5 count enable input (active LOW)
Q0 to Q3 6, 11, 14, 2 parallel output
V
SS
8 ground supply voltage
TC
7 terminal count output (active LOW)
MR 9 master reset input
UP/DN
10 up/down count control input
CP 15 clock pulse input (LOW to HIGH, edge triggered)
V
DD
16 supply voltage
HEF4516B All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved.
Product data sheet Rev. 7 — 11 November 2011 5 of 17
NXP Semiconductors
HEF4516B
Binary up/down counter
6. Functional description
[1] H = HIGH voltage level; L = LOW voltage level; X = don’t care; = positive-going transition.
Table 3. Function table
[1]
MR PL UP/DN CE CP MODE
LHXXXparallel load
L L X H X no change
LLLL count down
LLHL count up
HXXXXreset
Fig 4. Timing diagram
001aae693
CP
CE
UP/DN
MR
PL
D0
V
DD
D1
D2
D3
Q0
5678910111213141598765432100150
V
SS
TC
Q1
Q2
Q3
count
HEF4516B All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved.
Product data sheet Rev. 7 — 11 November 2011 6 of 17
NXP Semiconductors
HEF4516B
Binary up/down counter
7. Limiting values
[1] For DIP16 package: P
tot
derates linearly with 12 mW/K above 70 C.
[2] For SO16 package: P
tot
derates linearly with 8 mW/K above 70 C.
8. Recommended operating conditions
Logic equation for terminal count:
.
Fig 5. State diagram
001aae692
0
15
14
13
12
count up
count down
1 2 3 4
5
6
7
11 10 9 8
TC CE UP DNQ0 Q1 Q2 Q3 UP DNQ0 Q1 Q2 Q3+=
Table 4. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol Parameter Conditions Min Max Unit
V
DD
supply voltage 0.5 +18 V
I
IK
input clamping current V
I
< 0.5 V or V
I
>V
DD
+ 0.5 V - 10 mA
V
I
input voltage 0.5 V
DD
+ 0.5 V
I
OK
output clamping current V
O
< 0.5 V or V
O
>V
DD
+ 0.5 V - 10 mA
I
I/O
input/output current - 10 mA
I
DD
supply current - 50 mA
T
stg
storage temperature 65 +150 C
T
amb
ambient temperature 40 +85 C
P
tot
total power dissipation DIP16 package
[1]
-750mW
SO16 package
[2]
-500mW
P power dissipation per output - 100 mW
Table 5. Recommended operating conditions
Symbol Parameter Conditions Min Typ Max Unit
V
DD
supply voltage 3 - 15 V
V
I
input voltage 0 - V
DD
V
T
amb
ambient temperature in free air 40 - +85 C

HEF4516BT,653

Mfr. #:
Manufacturer:
NXP Semiconductors
Description:
Counter Shift Registers BINARY U/D COUNTER
Lifecycle:
New from this manufacturer.
Delivery:
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