IDT
®
Programmable System Clock Chip for ATI RD790-K8
TM
Based Systems 1393—01/28/14
9LPRS477C
Programmable System Clock Chip for ATI RD790 - K8
TM
based Systems
3
VFQFPN Pin Description (Continued)
PIN # PIN NAME PIN TYPE DESCRIPTION
33 GNDATIG GND Ground pin for the ATIG outputs
34 VDDATIG PWR Power supply for ATIG core, nominal 3.3V
35 ATIG1C_LPRS OUT
Complementary clock of low-power differential push-pull PCI-Express pair with integrated series resistor.
(no 50ohm shunt resistor to GND and no 33 ohm series resistor needed)
36 ATIG1T_LPRS OUT
True clock of low-power differential push-pull PCI-Express pair with integrated series resistor. (no 50ohm
shunt resistor to GND and no 33 ohm series resistor needed)
37 ATIG0C_LPRS OUT
Complementary clock of low-power differential push-pull PCI-Express pair with integrated series resistor.
(no 50ohm shunt resistor to GND and no 33 ohm series resistor needed)
38 ATIG0T_LPRS OUT
True clock of low-power differential push-pull PCI-Express pair with integrated series resistor. (no 50ohm
shunt resistor to GND and no 33 ohm series resistor needed)
39 VDDSATA PWR Power supply for SATA core logic, nominal 3.3V
40 SRC6C/SATAC_LPRS OUT
Complement clock of low power differential SRC/SATA clock pair. (no 50ohm shunt resistor to GND and no
33 ohm series resistor needed
41 SRC6T/SATAT_LPRS OUT
True clock of low power differential SRC/SATA clock pair. (no 50ohm shunt resistor to GND and no 33 ohm
series resistor needed
42 GNDSATA GND Ground pin for the SRC outputs
43 GNDA GND Ground for the Analog Core
44 VDDA PWR 3.3V Power for the Analog Core
45 CPUKG1C_LPRS/SRC7C_LPRS OUT
Complementary signal of low-power differential push-pull AMD K8 "Greyhound" clock with integrated series
resistor.(no 33 ohm series resistor needed) / Complement clock of low power differential SRC clock pair.
(no 50ohm shunt resistor to GND and no 33 ohm series resistor needed
46 CPUKG1T_LPRS/SRC7T_LPRS OUT
True signal of low-power differential push-pull AMD K8 "Greyhound" clock with integrated series resistor.
(no 33 ohm series resistor needed) / True clock of low power differential SRC clock pair. (no 50ohm shunt
resistor to GND and no 33 ohm series resistor needed
47 GNDCPU GND Ground pin for the CPU outputs
48 VDDCPU PWR Supply for CPU core, 3.3V nominal
49 CPUKG0C_LPRS OUT
Complementary signal of low-power differential push-pull AMD K8 "Greyhound" clock with integrated series
resistor. (no 33 ohm series resistor needed)
50 CPUKG0T_LPRS OUT
True signal of low-power differential push-pull AMD K8 "Greyhound" clock with integrated series resistor.(no
33 ohm series resistor needed)
51 PD# IN
Enter /Exit Power Down.
0 = Power Down, 1 = normal operation.
52 RESTORE# I/O
Open Drain I/O. As an input it res tores the PLL's to power up default state. As an output, this signal is driven
low when the internal watchdog hardware timer expires. It is cleared when the internal watchdog hardware
timer is reset or disabled. The input is falling edge triggered.
0 = Restore Settings, 1 = normal operation.
53 GNDHTT PWR Ground pin for the HTT outputs
54 HTT0C_LPRS/66M OUT
Complementary signal of low-power differential push-pull hypertransport clock with integrated series
resistor. (no 50ohm shunt resistor to GND and no 33 ohm series resistor needed) / 3.3V single ended
66MHz hyper transport clock
55 HTT0T_LPRS/66M OUT
True signal of low-power differential push-pull hypertransport clock with integrated series resistor. (no
50ohm shunt resistor to GND and no 33 ohm series resistor needed) / 3.3V single ended 66MHz hyper
transport clock
56 VDDHTT PWR Supply for HTT clocks, nominal 3.3V.
57 REF2/SEL_OC_MODE** I/O
14.318 MHz 3.3V reference clock./ SEl_OC_MODE: latched input to select pin functionality
1 = ATIG/SRC PCIE Gen1 Mode with higher overclocking ability
0 = ATIG/SRC PCIE Gen2 Mode with limited overclocking ability
58 REF1/SEL_SATA I/O
14.318 MHz 3.3V reference clock./ 3.3V tolerant latched input to select function of SRC6/SATA output
0 = 100MHz differential spreading SRC clock, 1 = 100MHz non-spreading differential SATA clock
59 REF0/SEL_HTT66 I/O
14.318 MHz 3.3V reference clock./ 3.3V tolerant latched input to select Hyper Transport Clock Frequency.
0 = 100MHz differential HTT clock, 1 = 66MHz 3.3V single ended HTT clock
60 VDDREF PWR Ref, XTAL power supply, nominal 3.3V
61 GNDREF GND Ground pin for the REF outputs.
62 X1 IN Crystal input, nominally 14.318MHz
63 X2 OUT Crystal output, nominally 14.318MHz
64 VDD48 PWR Power pin for the 48MHz outputs and core. 3.3V
