IDT
®
Programmable System Clock Chip for ATI RD790-K8
TM
Based Systems 1393—01/28/14
9LPRS477C
Programmable System Clock Chip for ATI RD790 - K8
TM
based Systems
9
General SMBus serial interface information for the 9LPRS477C
How to Write:
• Controller (host) sends a start bit.
• Controller (host) sends the write address D2
(H)
• ICS clock will acknowledge
• Controller (host) sends the beginning byte location = N
• ICS clock will acknowledge
• Controller (host) sends the data byte count = X
• ICS clock will acknowledge
• Controller (host) starts sending Byte N through
Byte N + X -1
• ICS clock will acknowledge each byte one at a time
• Controller (host) sends a Stop bit
How to Read:
• Controller (host) will send start bit.
• Controller (host) sends the write address D2
(H)
• ICS clock will acknowledge
• Controller (host) sends the begining byte
location = N
• ICS clock will acknowledge
• Controller (host) will send a separate start bit.
• Controller (host) sends the read address D3
(H)
• ICS clock will acknowledge
• ICS clock will send the data byte count = X
• ICS clock sends Byte N + X -1
• ICS clock sends Byte 0 through byte X (if X
(H)
was written to byte 8).
• Controller (host) will need to acknowledge each byte
• Controller (host) will send a not acknowledge bit
• Controller (host) will send a stop bit
ICS (Slave/Receiver)
T
WR
ACK
ACK
ACK
ACK
ACK
P
Byte N + X - 1
Data Byte Count = X
Beginning Byte N
stoP bit
X Byte
Index Block Write Operation
Slave Address *D0
(H)
Beginning Byte = N
WRite
starT bit
Controller
Host
T starT bit
WR WRite
RT Repeat starT
RD ReaD
Beginning Byte N
Byte N + X - 1
N Not acknowledge
PstoP bit
ICS (Slave/Receiver)
Controller (Host)
X Byte
ACK
ACK
Data Byte Count = X
ACK
Slave Address *D1
(H)
Index Block Read Operation
Slave Address *D0
(H)
Beginning Byte = N
ACK
ACK
