Data Sheet ADL5303
Rev. A | Page 9 of 24
–6
–4
–2
2
4
–40 –30
–20
–10 0
10 20
30 40 50 60 70 80
V
os
DRIFT (mV)
TEMPERATURE (°C)
90
0
8
6
MEAN + 3σ
MEAN
10661-021
Figure 21. Output Buffer Offset vs. Temperature (3 σ to Either Side of Mean)
0
20
40
80
100
196 198 200 202
HITS
LOGARITHMIC SLOPE (mV/dec)
204
60
180
120
140
160
10661-022
Figure 22. Distribution of Logarithmic Slope
0
20
40
80
100
60
HITS
LOGARITHMIC INTERCEPT (pA
)
60
120
140
160
80
100
120 140
10661-023
Figure 23. Distribution of Logarithmic Intercept
0
20
40
80
100
–20
HITS
INPUT GUARD OFFSET (mV)
60
180
120
140
160
–10
0 10 20
10661-024
Figure 24. Distribution of Input Guard Offset Voltage V
OFS
(V
INPT
– V
SUM
)
ADL5303 Data Sheet
Rev. A | Page 10 of 24
THEORY OF OPERATION
BASIC CONCEPTS
The ADL5303 uses an advanced circuit implementation that
exploits the logarithmic relationship between the base-to-
emitter voltage, V
BE
, and collector current, I
C
, in a bipolar
transistor.
Using these principles, the relationship between the input current,
I
PD
, applied to the INPT pin, and the voltage appearing at the
intermediate output VLOG pin is:
V
LOG
= V
Y
log
10
(I
PD
/I
Z
) (1)
where:
V
Y
is the voltage slope (in the case of base-10 logarithms, it is
also referred to as volts per decade).
I
Z
is the fixed current in the logarithmic equation called the
intercept.
In the following example, the scaling is chosen so that V
Y
is
trimmed to 200 mV/decade (10 mV/dB). The intercept is
positioned at 100 pA; the output voltage, V
LOG
, crosses zero
when I
PD
is of this value. However, the actual V
LOG
must always
be slightly above ground. Using Equation 2, calculate the output
for any value of I
PD
. Thus, for an input current of 25 nA,
V
LOG
= 0.2 V log
10
(25 nA/100 pA) = 0.4796 V (2)
In practice, both the slope and intercept can be altered, to
either higher or lower values, without any significant loss of
calibration accuracy, by using one or two external resistors,
often in conjunction with the trimmed 2 V voltage reference
at the VREF pin.
OPTICAL MEASUREMENTS
When interpreting the I
PD
current in terms of optical power
incident on a photodetector, it is necessary to be clear about
the conversion (optical power to current) properties of a reverse
biased photodiode. The units of this conversion are expressed
in amps per watt and referred to as photodiode responsivity, ρ.
For the typical InGaAs PIN photodiode, the responsivity is
approximately 0.9 A/W.
It is important to note that in purely electrical circuits, current
and power are not related in this proportional manner. A
current applied to a resistive load results in a power propor-
tional to the square of the current, P = I
2
R. The difference in
scaling for a photodiode is because I
PD
flow in a reverse-biased
diode is largely dependent on the fixed built-in voltage of the
PN junction and is relatively insensitive to the external bias
voltage. In the detector diode, power dissipated is proportional
to the I
PD
current and the relationship of I
PD
to the optical
power, P
OPT
, is preserved.
I
PD
= ρP
OPT
(3)
The same relationship exists between the intercept current, I
Z
,
and an equivalent intercept power, P
Z
, thus,
I
PZ
= ρP
Z
(4)
Therefore, Equation 1 can be written as
V
LOG
= V
Y
log
10
(P
OPT
/P
Z
) (5)
For the ADL5303 operating in its default configuration, an I
Z
of 100 pA corresponds to a P
Z
of 110 pW, for a diode having
a responsivity of 0.9 A/W. Thus, an optical power of 3 mW
generates
V
LOG
= 0.2 V log
10
(3 mW/110 pW) = 1487 V (6)
Note that when using the ADL5303 in optical applications the
V
LOG
output is referred to in terms of the equivalent optical
power, the logarithmic slope remains 10 mV/dB at this output.
This can be confusing because a decibel change on the optical
side has a different meaning than on the electrical side. In either
case, the logarithmic slope can always be expressed in units of
millivolts per decade to help eliminate confusion.
DECIBEL SCALING
When power levels are expressed as decibels above a reference
level (in dBm, for a reference of 1 mW), the logarithmic conver-
sion has already been performed, and the log ratio in the previous
expressions becomes a simple difference. Be careful in assigning
variable names here, because P is often used to denote actual
power as well as this same power expressed in decibels; how-
ever, these are numerically different quantities.
BANDWIDTH AND NOISE CONSIDERATIONS
Response time and wideband noise of translinear log amps
are a function of the signal current, I
PD
. Bandwidth becomes
progressively lower as I
PD
is reduced, largely due to the effects
of junction capacitances in the translinear device.
Figure 9 shows ac response curves for the ADL5303 at eight
representative currents of 1 nA to 10 mA, using R1 = 750
and C1 = 1000 pF. The values for R1 and C1 ensure stability
over the full 160 dB dynamic range. More optimal values may
be used for smaller subranges. A certain amount of experi-
mental trial and error may be necessary to select the optimum
input network component values for a given application.
The relationship between I
PD
and the voltage noise spectral
density, S
NSD
, associated with the V
BE
of Q1, calculates to the
following:
PD
NSD
I
S
7.14
=
(7)
where:
S
NSD
is nV/Hz.
I
PD
is expressed in microamps.
T
A
= 25°C.
Data Sheet ADL5303
Rev. A | Page 11 of 24
For an input of 1 nA, S
NSD
evaluates to almost 0.5 μV/√Hz;
assuming a 20 kHz bandwidth at this current, the integrated
noise voltage is 70 μV rms. However, this calculation is not
complete. The basic scaling of the V
BE
is approximately
3 mV/dB; translated to 10 mV/dB, the noise predicted by
Equation 7 must be multiplied by approximately 3.33. The
additive noise effects associated with the reference transistor,
Q2, and the temperature compensation circuitry must also be
included. The final voltage noise spectral density presented at
the VLOG pin varies inversely with I
PD
, but is not a simple
square root relationship. Figure 10 shows the measured noise
spectral density vs. frequency at the VLOG output, for the same
nine-decade spaced values of I
PD
.
CHIP ENABLE
Power down the ADL5303 by taking the PWDN pin to a high
logic level. The residual supply current in the disabled mode is
typically 60 μA.

ADL5303ACPZ-RL

Mfr. #:
Manufacturer:
Analog Devices Inc.
Description:
Logarithmic Amplifiers Log Amp
Lifecycle:
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