ADL5303 Data Sheet
Rev. A | Page 12 of 24
USING THE ADL5303
The default configuration (see Figure 25) includes a 2.5:1 atten-
uator in the feedback path around the buffer. This increases the
slope of 10 mV/dB at the VLOG pin to 25 mV/dB at VOUT.
For the full dynamic range of 160 dB (80 dB optical), the output
swing is 4.0 V, which can be accommodated by the rail-to-rail
output stage when using the recommended 5 V supply.
The capacitor from VLOG to ground forms an optional
single-pole low-pass filter. Because the resistance at this pin
is trimmed to 5 kΩ, an accurate time constant can be realized.
For example, with C
FLT
= 10 nF, the −3 dB corner frequency is
3.2 kHz. Such filtering is useful in minimizing the output noise,
particularly when I
PD
is small. Multipole filters are even more
effective in reducing noise. A capacitor between VSUM and
ground is essential for minimizing the noise on this node.
When the bias voltage at either VPDB or VREF is not needed,
these pins should be left unconnected.
SLOPE AND INTERCEPT ADJUSTMENTS
The choice of slope and intercept depends on the application.
The versatility of the ADL5303 permits optimal choices to
be made in two common situations. First, it allows an input
current range of less than the full 160 dB to use the available
voltage span at the output. Second, it allows this output voltage
range to be optimally positioned to fit the input capacity of a
subsequent ADC. In special applications, very high slopes, such
as 1 V/decade, allow small subranges of I
PD
to be covered at high
sensitivity.
The slope can be lowered without limit by the addition of a
shunt resistor, R
S
, from VLOG to ground. Because the resistance
at this pin is trimmed to 5 kΩ, the accuracy of the modified
slope depends on the external resistor. It is calculated by,
(8)
For example, using R
S
= 3 kΩ, the slope is lowered to 75 mV per
decade or 3.75 mV/dB. Table 4 provides a selection of suitable
values for R
S
and the resulting slopes.
Table 4. Examples of Lowering the Slope
R
S
(kΩ) V
Y
(mV/decade)
3 75
5 100
15 150
In addition to uses in filter and comparator functions, the
buffer amplifier provides the means to adjust both the slope
and intercept, which require a minimal number of external
components. The high input impedance at BFIN, low input
offset voltage, large output swing, and wide bandwidth of this
amplifier permit numerous transformations of the basic V
LOG
signal, using standard op amp circuit practices. For example, it
has been noted that to raise the gain of the buffer, and therefore
the slope, a feedback attenuator, R
A
and R
B
in Figure 25, should
be inserted between VLOG and the inverting input BFNG pin.
NC
V
OUT
500mV/DEC
200mV/DEC
R18 (R
B
)
10kΩ
~10k
Ω
R15 (R
A
)
15kΩ
5kΩ
C7 (C
FILT
)
NC
NC = NO CONNECT
V
P
100nF
R1
750
C1
1nF
I
PD
C3
PDB BIAS
VREF
VPDB
VSUM
INPT
VSUM
ACOM
VPS2
PWDN VPS1
VREF
VLOG
BFIN
BFNG
VOUT
0.5V
ADL5303
5
2
3
4
15 14
GND
GND
7 11
10
16
12
6
8
9
13
TEMPERATURE
COMPENSA
TION
10661-025
Figure 25. Basic Connections (R15, R18, C7 are Optional; R1 and C1 are the Default Values)
