XRT91L34
19
REV. 1.0.1
QUAD CHANNEL MULTIRATE STS-12/3/1 AND STM-4/1/0 SONET/SDH CDR
2.6 Differential Recovered Data Output Timing
The differential recovered data and clock outputs operating at the STS-12/STM-4 or STS-3/STM-1 or STS-1/
STM-0 datarates will adhere to the data valid output timing shown in Figure 9 ,Table 5, Table 6, and Table 7.
F
IGURE
9. D
IFFERENTIAL
R
ECOVERED
O
UTPUT
T
IMING
T
ABLE
5: R
ECOVERED
D
ATA
O
UTPUT
T
IMING
(STS-12/STM-4 O
PERATION
)
S
YMBOL
P
ARAMETER
M
IN
T
YP
M
AX
U
NITS
t
RXCLKO
Recovered high-speed output clock period 1.608 ns
t
RXDO_VALID
Time the data is valid on RXDO[3:0]P/N before and after the
rising edge of RXCLKO[3:0]P/N
0.5 ns
T
ABLE
6: R
ECOVERED
D
ATA
O
UTPUT
T
IMING
(STS-3/STM-1 O
PERATION
)
S
YMBOL
P
ARAMETER
M
IN
T
YP
M
AX
U
NITS
t
RXCLKO
Recovered high-speed output clock period 6.43 ns
t
RXDO_VALID
Time the data is valid on RXDO[3:0]P/N before and after the
rising edge of RXCLKO[3:0]P/N
2.8 ns
T
ABLE
7: R
ECOVERED
D
ATA
O
UTPUT
T
IMING
(STS-1/STM-0 O
PERATION
)
S
YMBOL
P
ARAMETER
M
IN
T
YP
M
AX
U
NITS
t
RXCLKO
Recovered high-speed output clock period 19.29 ns
t
RXDO_VALID
Time the data is valid on RXDO[3:0]P/N before and after the
rising edge of RXCLKO[3:0]P/N
8.3 ns
RXCLKO[3:0]P/N
RXDO[3:0]P/N
t
RXDO_VALID
t
RXCLKO
D1 D2 D4D3 D5
