IDT
®
18 Output PCIe G2/QPI Differential Buffer with 2:1 input mux 1463E — 07/20/11
9EX21801A
18 Output PCIe G2/QPI Differential Buffer with 2:1 input mux
13
Datasheet
SYMBOL 72L
N72 A0.81.0
N
D
18 A1 0 0.05
N
E
18 A3
b 0.18 0.3
e
D x E BASIC
D2 MIN. / MAX. 5.75 6.15
E2 MIN. / MAX. 5.75 6.15
L MIN. / MAX. 0.3 0.5
DIMENSIONS
THERMALLY ENHANCED, VERY THIN, FINE PITCH
QUAD FLAT / NO LEAD PLASTIC PACKAGE
DIMENSIONS (mm)
SYMBOL MIN. MAX.
0.25 Reference
0.50 BASIC
10.00 x 10.00
E
Top View
OR
Anvil
Singulation
A3
L
N
(Ref.)
e
e
e
e
(Ref. )
(Ref. )
(Ref. )
(Typ.)
If
A1
Even
E2
D2
D2
2
A
C
0.08
C
E2
2
2
2
1
Sawn
Singulation
Index Area
Seating Plane
are Even
Thermal
Base
Odd
b
(N - 1)x
N
1
Chamfer 4x
0.6 x 0.6 max
OPTIONAL
D
D
&
&N
D
N
D
N
E
N
E
&N
D
N
E
(N - 1)x
E
Ordering Information
Part / Order Number Shipping Packaging Package Temperature
9EX21801AKLF Tray 72-pin MLF 0 to +70°C
9EX21801AKLFT Tape an d Reel 72-pin MLF 0 to +70°C
9EX21801AKILF Tray 72-pin MLF -40 t o +85°C
9EX21801AKILFT Tape and Reel 72-pin MLF -40 to +85°C
LF” suffix to the part number are the Pb-Free configuration and are RoHS compliant.
A is the device revision designator (will not correlate to the datasheet revision).
9EX21801A
18 Output PCIe G2/QPI Differential Buffer with 2:1 input mux
14
Datasheet
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pcclockhelp@idt.com
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© 2010 Integrated Device Technology, Inc. All rights reserved. Product specifications subject to change without notice. IDT, ICS, and the IDT logo are trademarks
of Integrated Device Technology, Inc. Accelerated Thinking is a service mark of Integrated Device Technology, Inc. All other brands, product names and marks
are or may be trademarks or registered trademarks used to identify products or services of their respective owners.
Printed in USA
Revision Histor
y
Rev. Issue Date Description Pa
g
e #
A 1 2/17/2008
1
.
U
p
d
a
t
e
d
PLL
mo
d
e
i
npu
t
f
requency range
2. Noted that Modulation frequency is the Allowable Spread Modulation
Frequency. Added foonote 3.
3. Corrected PCIe Gen1 Max phase jitter spec to be 86 ps inst ead of 108ps.
86ps is the derated limit when using ~160K cycles to calculate the value.
Released to final - Rev A.
5,8
B 1/20/2010 1. Corrected Pin Description for Pin 62. 0 = 133M, 1 = 100M. 4
C 2/4/2010
1. Changed Pin Description for Pin 62. Instead of defining the functionality in
the description, the description now refers to the Frequency Functionality
Table for definition.
4
D5/13/2011
1. Added separate input frequency spec for 100M and 133M.
5
E 7/20/2011 Added I-temp information Various

9EX21801AKILFT

Mfr. #:
Manufacturer:
IDT
Description:
Clock Generators & Support Products PCIE BUFFER
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
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