19
32142DS–06/2013
ATUC64/128/256L3/4U
3.4.5 TWI Pins PA05/PA07/PA17
When these pins are used for TWI, the pins are open-drain outputs with slew-rate limitation and
inputs with spike filtering. When used as GPIO pins or used for other peripherals, the pins have
the same characteristics as other GPIO pins.
After reset a TWI function is selected on these pins instead of the GPIO. Please refer to the
GPIO Module Configuration chapter for details.
3.4.6 GPIO Pins
All the I/O lines integrate a pull-up resistor Programming of this pull-up resistor is performed
independently for each I/O line through the GPIO Controllers. After reset, I/O lines default as
inputs with pull-up resistors disabled, except PA00 which has the pull-up resistor enabled. PA20
selects SCIF-RC32OUT (GPIO Function F) as default enabled after reset.
3.4.7 High-drive Pins
The six pins PA02, PA06, PA08, PA09, PB01, and PB15 have high-drive output capabilities.
Refer to Section 34. on page 991 for electrical characteristics.
3.4.8 USB Pins PB13/PB14
When these pins are used for USB, the pins are behaving according to the USB specification.
When used as GPIO pins or used for other peripherals, the pins have the same behaviour as
other normal I/O pins, but the characteristics are different. Refer to Section 34. on page 991 for
electrical characteristics.
To be able to use the USB I/O the VDDIN power supply must be 3.3
V nominal.
3.4.9 RC32OUT Pin
3.4.9.1 Clock output at startup
After power-up, the clock generated by the 32kHz RC oscillator (RC32K) will be output on PA20,
even when the device is still reset by the Power-On Reset Circuitry. This clock can be used by
the system to start other devices or to clock a switching regulator to rise the power supply volt-
age up to an acceptable value.
The clock will be available on PA20, but will be disabled if one of the following conditions are
true:
• PA20 is configured to use a GPIO function other than F (SCIF-RC32OUT)
• PA20 is configured as a General Purpose Input/Output (GPIO)
• The bit FRC32 in the Power Manager PPCR register is written to zero (refer to the Power
Manager chapter)
The maximum amplitude of the clock signal will be defined by VDDIN.
Once the RC32K output on PA20 is disabled it can never be enabled again.
3.4.9.2 XOUT32_2 function
PA20 selects RC32OUT as default enabled after reset. This function is not automatically dis-
abled when the user enables the XOUT32_2 function on PA20. This disturbs the oscillator and
may result in the wrong frequency. To avoid this, RC32OUT must be disabled when XOUT32_2
is enabled.
