MARCH 3, 2017 13 PROGRAMMABLE CLOCK GENERATOR
5P49V5901 DATASHEET
Table 10:Input Capacitance, LVCMOS Output Impedance, and Internal Pull-down
Resistance
(T
A
= +25 °C)
Table 11:Crystal Characteristics
Note: Typical crystal used is FOX 603-25-150. For different reference crystal options please go to www.foxonline.com.
Table 12:DC Electrical Characteristics
Symbol Parameter Min Typ Max Unit
CIN
Input Capacitance (CLKIN, CLKINB, CLKSEL, SD/OE,
SEL1/SDA, SEL0/SCL)
37pF
Pull-down Resistor
CLKSEL, SD/OE, SEL1/SDA, SEL0/SCL, CLKIN, CLKINB,
OUT0_SEL_I2CB
100 300 k
ROUT
LVCMOS Output Driver Impedance (VDDO = 1.8V, 2.5V, 3.3V)
17
XIN/ RE F
Programmable capacitance at XIN/REF
925pF
XOUT
Programmable capacitance at XOUT
925pF
Parameter Test Conditions Minimum Typical Maximum Units
Mode of Oscillation
Frequency 82540MHz
Equivalent Series Resistance (ESR) 10 100
Shunt Capacitance 7pF
Load Capacitance (CL) @ <=25 MHz 6 8 12 pF
Load Capacitance (CL) >25M to 40M 6 8 pF
Maximum Crystal Drive Level 100 µW
Fundamental
Symbol Parameter Test Conditions Min Typ Max Unit
Iddcore
3
Core Supply Current
100 MHz on all outputs, 25 MHz
REFCLK
30 34 mA
LVPECL, 350 MHz, 3.3V VDDOx 42 47 mA
LVPECL, 350 MHz, 2.5V VDDOx 37 42 mA
LVDS, 350 MHz, 3.3V VDDOx 18 21 mA
LVDS, 350 MHz, 2.5V VDDOx 17 20 mA
LVDS, 350 MHz, 1.8V VDDOx 16 19 mA
HCSL, 250 MHz, 3.3V VDDOx, 2 pF load 29 33 mA
HCSL, 250 MHz, 2.5V VDDOx, 2 pF load 28 33 mA
LVCMOS, 50 MHz, 3.3V, VDDOx
1,2
16 18 mA
LVCMOS, 50 MHz, 2.5V, VDDOx
1,2
14 16 mA
LVCMOS, 50 MHz, 1.8V, VDDOx
1,2
12 14 mA
LVCMOS, 200 MHz, 3.3V VDDOx
1
36 42 mA
LVCMOS, 200 MHz, 2.5V VDDOx
1,2
27 32 mA
LVCMOS, 200 MHz, 1.8V VDDOx
1,2
16 19 mA
Iddpd Power Down Current SD asserted, I2C Programming 10 14 mA
1. Single CMOS driver active.
2. Measured into a 5” 50 Ohm trace with 2 pF load.
3. Iddcore = IddA+ IddD, no loads.
Iddox Output Buffer Supply Current
PROGRAMMABLE CLOCK GENERATOR 14 MARCH 3, 2017
5P49V5901 DATASHEET
Table 13:Electrical Characteristics – Differential Clock Input Parameters
1,2
(Supply
Voltage V
DDA
, V
DDD
, V
DDO
0
= 3.3V ±5%, 2.5V ±5%, 1.8V ±5%, TA = -40°C to +85°C)
1. Guaranteed by design and characterization, not 100% tested in production.
2. Slew rate measured through ±75mV window centered around differential zero.
Table 14:DC Electrical Characteristics for 3.3V LVCMOS (V
DDO
= 3.3V±5%, TA = -40°C to +85°C)
1
1. See “Recommended Operating Conditions” table.
Table 15:DC Electrical Characteristics for 2.5V LVCMOS (V
DDO
= 2.5V±5%, TA = -40°C to +85°C)
Symbol Parameter Test Conditions Min Typ Max Unit
VIH
Input High Voltage - CLKIN, CLKIN
B
Single-ended input 0.55 1.7 V
VIL Input Low Voltage - CLKIN, CLKINB Single-ended input GND - 0.3 0.4 V
VSWING
Input Amplitude - CLKIN, CLKINB Peak to Peak value, single-ended 200 1200 mV
dv/dt Input Slew Rate - CLKIN, CLKINB Measured differentially 0.4 8 V/ns
IIL Input Leakage Low Current VIN = GND -5 5 µA
IIH Input Leakage High Current VIN = 1.7V 20 µA
dTIN Input Duty Cycle Measurement from differential waveform 45 55 %
Symbol Parameter Test Conditions Min Typ Max Unit
VOH Output HIGH Voltage
IOH = -15mA
2.4 VDDO V
VOL Output LOW Voltage
IOL = 15mA
0.4 V
IOZDD Output Leakage Current (OUT1~4)
Tri-state outputs, VDDO = 3.465V
A
IOZDD Output Leakage Current (OUT0)
Tri-state outputs, VDDO = 3.465V
30 µA
VIH Input HIGH Voltage
Single-ended inputs - CLKSEL, SD/OE
0.7xVDDD VDDD + 0.3 V
VIL Input LOW Voltage
Single-ended inputs - CLKSEL, SD/OE
GND - 0.3 0.3xVDDD V
VIH Input HIGH Voltage
Single-ended input OUT0_SEL_I2CB
2VDDO0 + 0.3V
VIL Input LOW Voltage
Single-ended input OUT0_SEL_I2CB
GND - 0.3 0.4 V
VIH Input HIGH Voltage
Single-ended input - XIN/REF
0.8 1.2 V
VIL Input LOW Voltage
Single-ended input - XIN/REF
GND - 0.3 0.4 V
T
R
/T
F
Input Rise/Fall Time
CLKSEL, SD/OE, SEL1/SDA,
SEL0/SCL
300 ns
Symbol Parameter Test Conditions Min Typ Max Unit
VOH Output HIGH Voltage
IOH = -12mA
0.7xVDDO V
VOL Output LOW Voltage
IOL = 12mA
0.4 V
IOZDD Output Leakage Current (OUT1~4)
Tri-state outputs, VDDO = 2.625V
A
IOZDD Output Leakage Current (OUT0)
Tri-state outputs, VDDO = 2.625V
30 µA
VIH Input HIGH Voltage
Single-ended inputs - CLKSEL, SD/OE
0.7xVDDD VDDD + 0.3 V
VIL Input LOW Voltage
Single-ended inputs - CLKSEL, SD/OE
GND - 0.3 0.3xVDDD V
VIH Input HIGH Voltage
Single-ended input OUT0_SEL_I2CB
1.7 VDDO0 + 0.3 V
VIL Input LOW Voltage
Single-ended input OUT0_SEL_I2CB
GND - 0.3 0.4 V
VIH Input HIGH Voltage
Single-ended input - XIN/REF
0.8 1.2 V
VIL Input LOW Voltage
Single-ended input - XIN/REF
GND - 0.3 0.4 V
T
R
/T
F
Input Rise/Fall Time
CLKSEL, SD/OE, SEL1/SDA,
SEL0/SCL
300 ns
MARCH 3, 2017 15 PROGRAMMABLE CLOCK GENERATOR
5P49V5901 DATASHEET
Table 16:DC Electrical Characteristics for 1.8V LVCMOS (V
DDO
= 1.8V±5%, TA = -40°C to +85°C)
Table 17:DC Electrical Characteristics for LVDS(V
DDO
= 3.3V+5% or 2.5V+5%, TA = -40°C to +85°C)
Table 18:DC Electrical Characteristics for LVDS (V
DDO
= 1.8V+5%, TA = -40°C to +85°C)
Symbol Parameter Min Typ Max Unit
V
OT
(+)
Differential Output Voltage for the TRUE binary state
247 454 mV
V
OT
(-)
Differential Output Voltage for the FALSE binary state
-247 -454 mV
V
OT
Change in V
OT
between Complimentary Output States
50 mV
V
OS
Output Common Mode Voltage (Offset Voltage)
1.125 1.25 1.375 V
V
OS
Change in V
OS
between Complimentary Output States
50 mV
I
OS
Outputs Short Circuit Current, V
OUT
+ or V
OUT
- = 0V or V
DDO
924mA
I
OSD
Differential Outputs Short Circuit Current, V
OUT
+ = V
OUT
-
612mA
Symbol Parameter Min Typ Max Unit
V
OT
(+)
Differential Output Voltage for the TRUE binary state
247 454 mV
V
OT
(-)
Differential Output Voltage for the FALSE binary state
-247 -454 mV
V
OT
Change in V
OT
between Complimentary Output States
50 mV
V
OS
Output Common Mode Voltage (Offset Voltage)
0.8 0.875 0.95 V
V
OS
Change in V
OS
between Complimentary Output States
50 mV
I
OS
Outputs Short Circuit Current, V
OUT
+ or V
OUT
- = 0V or V
DDO
924mA
I
OSD
Differential Outputs Short Circuit Current, V
OUT
+ = V
OUT
-
612mA
Symbol Parameter Test Conditions Min Typ Max Unit
VOH Output HIGH Voltage
IOH = -8mA
0.7 xVDDO VDDO V
VOL Output LOW Voltage
IOL = 8mA
0.25 x VDDO V
IOZDD Output Leakage Current (OUT1~4)
Tri-state outputs, VDDO = 3.465V
A
IOZDD Output Leakage Current (OUT0)
Tri-state outputs, VDDO = 3.465V
30 µA
VIH Input HIGH Voltage
Single-ended inputs - CLKSEL, SD/OE
0.7xVDDD VDDD + 0.3 V
VIL Input LOW Voltage
Single-ended inputs - CLKSEL, SD/OE
GND - 0.3 0.3xVDDD V
VIH Input HIGH Voltage
Single-ended input OUT0_SEL_I2CB
0.65 * VDDO0 VDDO0 + 0.3 V
VIL Input LOW Voltage
Single-ended input OUT0_SEL_I2CB
GND - 0.3 0.4 V
VIH Input HIGH Voltage
Single-ended input - XIN/REF
0.8 1.2 V
VIL Input LOW Voltage
Single-ended input - XIN/REF
GND - 0.3 0.4 V
T
R
/T
F
Input Rise/Fall Time
CLKSEL, SD/OE, SEL1/SDA,
SEL0/SCL
300 ns

5P49V5901B045NLGI8

Mfr. #:
Manufacturer:
IDT
Description:
Clock Generators & Support Products VersaClock 5 CLK Gen 350MHz 2 Input
Lifecycle:
New from this manufacturer.
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