AD7492
Rev. A | Page 5 of 24
Parameter A Version
2
B Version
2
Unit Test Conditions/Comments
DC ACCURACY f
S
= 1 MSPS for AD7492
f
S
= 400 kSPS for AD7492-4
Resolution 12 12 Bits
Integral Nonlinearity ±1.5 LSB max
±0.6 LSB typ V
DD
= 5 V
±1 LSB max V
DD
= 3 V
Differential Nonlinearity +1.5/−0.9 +1.5/−0.9 LSB max Guaranteed no missed codes to
12 bits (A and B versions)
Offset Error ±9 ±9 LSB max
Gain Error ±2.5 ±2.5 LSB max
ANALOG INPUT
Input Voltage Ranges 0 to 2.5 0 to 2.5 V
DC Leakage Current ±1 ±1 μA max
Input Capacitance 33 33 pF typ
REFERENCE OUTPUT
REF OUT Output Voltage Range 2.5 2.5 V ±1.5% for specified performance
LOGIC INPUTS
Input High Voltage, V
INH
4
V
DRIVE
× 0.7 V
DRIVE
× 0.7 V min V
DD
= 5 V ± 5%
Input Low Voltage, V
INL
4
V
DRIVE
× 0.3 V
DRIVE
× 0.3 V max V
DD
= 5 V ± 5%
Input Current, I
IN
±1 ±1 μA max Typically 10 nA, V
IN
= 0 V or V
DD
Input Capacitance, C
IN
3,
5
10 10 pF max
LOGIC OUTPUTS
Output High Voltage, V
OH
V
DRIVE
− 0.2 V
DRIVE
− 0.2 V min I
SOURCE
= 200 μA
Output Low Voltage, V
OL
0.4 0.4 V max I
SINK
= 200 μA
Floating-State Leakage Current ±10 ±10 μA max
Floating-State Output Capacitance 10 10 pF max
Output Coding
Straight (Natural)
Binary
Straight (Natural)
Binary
CONVERSION RATE
Conversion Time 880 880 ns max
Track/Hold Acquisition Time 120 120 ns min
Throughput Rate 1
400
1 MSPS max
kSPS max
Conversion time + acquisition
time for AD7492
Conversion time + acquisition
time for AD7492-4
POWER REQUIREMENTS
V
DD
2.7/5.25 2.7/5.25 V min/max
I
DD
Digital I/Ps = 0 V or DV
DD
.
Normal Mode 3 3 mA max f
S
= 1 MSPS, typ 2.2 mA
f
S
= 400 kSPS, Typ 2.2 mA
(AD7492-4)
Quiescent Current 1.8 1.8 mA max
Partial Sleep Mode 250 250 μA max Static, typ 190 μA
Full Sleep Mode 1 1 μA max Static, typ 200 nA
Power Dissipation
4, 6
Digital I/Ps = 0 V or DV
DD
Normal Mode 15 15 mW max V
DD
= 5 V
Partial Sleep Mode 1.25 1.25 mW max V
DD
= 5 V
Full Sleep Mode 5 5 μW max V
DD
= 5 V
1
Only A version specification applies to the AD7492-4.
2
Temperature ranges as follows: A and B versions: −40°C to +85°C.
3
500 kHz sine wave specifications do not apply for the AD7492-4.
4
V
INH
and V
INL
trigger levels are set by the V
DRIVE
voltage. The logic interface circuitry is powered by V
DRIVE
.
5
Sample tested @ 25°C to ensure compliance.
6
See the Power vs. Throughput section.
