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MAX6880ETG+T

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P19
MAX6880–MAX6883
Dual-/Triple-Voltage, Power-Supply
Sequencers/Supervisors
4 _______________________________________________________________________________________
250mV DOWN =
FAULT THRESHOLD
250mV DOWN =
FAULT THRESHOLD
125mV DOWN =
STOP RAMP THRESHOLD
125mV UP =
STOP RAMP THRESHOLD
250mV UP =
FAULT THRESHOLD
250mV UP =
FAULT THRESHOLD
REFERENCE RAMP
REFERENCE RAMP
POWER-UP POWER-DOWN
Figure 1. Stop Ramp/Fault Window During Power-Up and Power-Down
EN/UV
BUS VOLTAGE MONITORED THROUGH EN/UV INPUT
IN_
IN1 = 3.3V
IN2 = 1.8V
IN3 = 0.7V
OUT_
OUT1 = 3.3V
OUT2 = 1.8V
OUT3 = 0.7V
CAPACITOR-
ADJUSTED
SLEW RATE
PG/RST
MONITORED THROUGH SET THRESHOLDS ON SET_ INPUTS
t
DELAY
t
DELAY
t
DELAY
t
TIMEOUT
V
EN_R
EN/UV
V
EN_F
Figure 2. Sequencing In Normal Mode
MAX6880–MAX6883
Dual-/Triple-Voltage, Power-Supply
Sequencers/Supervisors
_______________________________________________________________________________________ 5
IN_
V
EN_R
IN1 = 3.3V
IN2 = 1.8V
IN3 = 0.7V
MONITORED THROUGH SET THRESHOLDS ON SET_ INPUTS
OUT_
OUT2 = 1.8V
OUT3 = 0.7V
OUT1 = 3.3V
EN/UV
EN/UV
BUS VOLTAGE MONITORED THROUGH EN/UV INPUT
FORCED INTO QUICK SHUTDOWN WHEN OUT1 FALLS BELOW 92.5% of IN1
OUT_ FORCED
BELOW V
TH_PG
CAPACITOR-
ADJUSTED
SLEW RATE
PG/RST
t
DELAY
t
DELAY
t
DELAY
t
TIMEOUT
Figure 3. Sequencing In Fast Shutdown Mode
MAX6880–MAX6883
Dual-/Triple-Voltage, Power-Supply
Sequencers/Supervisors
6 _______________________________________________________________________________________
BUS VOLTAGE MONITORED
THROUGH EN/UV INPUT
IN_
IN1 = 3.3V
IN2 = 1.8V
IN3 = 0.7V
OUT_
OUT1 = 3.3V
OUT2 = 1.8V
OUT3 = 0.7V
MONITORED THROUGH SET THRESHOLDS ON SET_ INPUTS
EN/UV EN/UV
PG/RST = LOW
CAPACITOR-
ADJUSTED
SLEW RATE
t
DELAY
t
DELAY
t
DELAY
t
TIMEOUT
V
EN_R
V
EN_F
Figure 4. Timing Diagram (Aborted Sequencing)
OUT1
OUT2
OUT3 IS SLOW
OUT_
OUT1
OUT2
OUT3 IS SLOW
t
DELAY
t
DELAY
t
DELAY
t
DELAY
t
DELAY
t
FAULT
t
FAULT
AND t
RETRY
NOT TO SCALE
ALL SET > 0.5V AND IN_ ≥ 2.7V
t
FAULT
t
RETRY
t
DELAY
EN/UV
V
EN_R
Figure 5. t
FAULT
and t
RETRY
Timing Diagram in Sequencing
P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P19

MAX6880ETG+T

Mfr. #:
Buy MAX6880ETG+T
Manufacturer:
Maxim Integrated
Description:
Supervisory Circuits Triple Power-Sup Sequencer
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
T/T Paypal Visa MoneyGram Western Union

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