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MAX6880ETG+T

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P19
MAX6880–MAX6883
Dual-/Triple-Voltage, Power-Supply
Sequencers/Supervisors
_______________________________________________________________________________________ 7
V
CC
SUPPLY CURRENT
vs. INPUT VOLTAGE
MAX6880 toc01
INPUT VOLTAGE (V)
V
CC
SUPPLY CURRENT (mA)
5.04.54.03.53.0
0.9
1.0
1.1
1.2
1.3
1.4
0.8
2.5 5.5
T
A
= +85°C
T
A
= -40°C
T
A
= +25°C
NORMALIZED POWER-GOOD TIMEOUT
vs. TEMPERATURE
MAX6880 toc02
TEMPERATURE (°C)
NORMALIZED POWER-GOOD TIMEOUT
6035-15 10
0.80
0.85
0.90
0.95
1.00
1.05
1.10
1.15
0.75
-40 85
POWER-GOOD TIMEOUT
vs. C
TIMEOUT
MAX6880 toc03
C
DELAY
(µF)
POWER-GOOD TIMEOUT (ms)
0.10.010.001
1
10
100
1000
0.1
0.0001 1
NORMALIZED SET_ THRESHOLD
vs. TEMPERATURE
MAX6880 toc04
TEMPERATURE (°C)
NORMALIZED SET_ THRESHOLD
603510-15
0.996
0.997
0.998
0.999
1.000
1.001
1.002
1.003
1.004
1.005
0.995
-40 85
NORMALIZED DELAY TIMEOUT
vs. TEMPERATURE
MAX6880 toc05
TEMPERATURE (°C)
NORMALIZED DELAY TIMEOUT
603510-15
0.80
0.85
0.90
0.95
1.00
1.05
1.10
1.15
1.20
1.25
0.75
-40 85
SLEW RATE
vs. C
SLEW
MAX6880 toc06
C
SLEW
(pF)
SLEW RATE (V/s)
100 1000
100
1000
10,000
10
10 10,000
DELAY TIMEOUT
vs. C
DELAY
MAX6880 toc07
C
DELAY
(µF)
DELAY TIMEOUT (ms)
0.10.010.001
1
10
100
1000
0.1
0.0001 1
NORMALIZED EN/UV THRESHOLD
vs. TEMPERATURE
MAX6880 toc08
TEMPERATURE (°C)
NORMALIZED EN_/UV THRESHOLD
603510-15
0.996
0.997
0.998
0.999
1.000
1.001
1.002
1.003
1.004
1.005
0.995
-40 85
IN_ TRANSIENT DURATION
vs. IN THRESHOLD OVERDRIVE
MAX6880 toc09
IN_ THRESHOLD OVERDRIVE (mV)
IN_ TRANSIENT DURATION (µs)
25020015010050
3
6
9
12
15
18
21
24
27
30
0
0 300
PG/RST GOES LOW ABOVE THE CURVE
IN_ = 3.3V
Typical Operating Characteristics
(V
IN_
= 2.7V to 5.5V, C
SLEW
= 200pF, EN = MARGIN = ABP, T
A
= +25°C, unless otherwise noted.)
MAX6880–MAX6883
Dual-/Triple-Voltage, Power-Supply
Sequencers/Supervisors
8 _______________________________________________________________________________________
Typical Operating Characteristics (continued)
(V
IN_
= 2.7V to 5.5V, C
SLEW
= 200pF, EN = MARGIN = ABP, T
A
= +25°C, unless otherwise noted.)
GATE_ VOLTAGE LOW
vs. SINK CURRENT
MAX6880 toc10
GATE SINK CURRENT (mA)
GATE_ VOLTAGE LOW (V)
981 2 3 5 64 7
0.2
0.4
0.6
0.8
1.0
1.2
1.4
1.6
0
010
GATE_ OUTPUT VOLTAGE HIGH
vs. GATE SOURCE CURRENT
MAX6880 toc11
GATE SOURCE CURRENT (µA)
GATE VOLTAGE (V)
2.52.01.51.00.5
1
2
3
4
5
6
7
8
9
10
0
0 3.0
SEQUENCING MODE
MAX6880 toc12
20ms/div
OUT1
1V/div
OUT2
1V/div
EN/UV
2V/div
OUT3
1V/div
FAST SHUTDOWN WITH RETRY
MAX6880 toc13
40ms/div
OUT1
1V/div
OUT2
1V/div
EN/UV
2V/div
OUT3
1V/div
FAST SHUTDOWN WITH RETRY
MAX6880 toc14
100ms/div
PG/RST
1V/div
OUT2
2V/div
OUT1
2V/div
OUT3
2V/div
OUT3 PULLED BELOW
92.5% OF IN3 FOR
SEQUENCING MODE
MAX6880–MAX6883
Dual-/Triple-Voltage, Power-Supply
Sequencers/Supervisors
_______________________________________________________________________________________ 9
Pin Description
PIN
MAX6880 MAX6881 MAX6882 MAX6883
NAME
FUNCTION
1, 11,
12, 15
——
1, 8, 9, 10
N.C. No Connection. Not internally connected.
2 — 1 — ABP
Internal Supply Bypass Input. Bypass ABP with a 1µF capacitor to
GND. ABP maintains the device supply voltage during rapid power-
down conditions.
3 2 — — SET3
4 3 2 2 SET2
5 4 3 3 SET1
Externally Adjusted IN_ Undervoltage Lockout Threshold. Connect
SET_ to an external resistor-divider network to set the desired
undervoltage threshold for each IN_ supply (see the Typical
Application Circuit). All SET_ inputs must be above the internal
SET_ threshold (0.5V) to enable sequencing functionality.
6544
EN/UV
Logic-Enable Input or Undervoltage Lockout Monitor Input. EN/UV
must be high (EN/UV > V
EN_R
) to enable voltage sequencing
power-up operation. OUT_ begins tracking down when EN/UV <
V
EN_F
. Connect EN/UV to an external resistor-divider network to set
the external UVLO threshold.
7 6 5 5 GND Ground
8766
DELAY
Sequence Delay Select Input. Connect a capacitor from DELAY
to GND to select the desired delay period before sequencing is
enabled (after all SET_ inputs and EN/UV are above their respective
thresholds) or between supply sequences. Leave DELAY
unconnected for the default 200µs delay period.
9 8 7 7 SLEW
Slew-Rate Adjustment Input. Connect a capacitor from SLEW
to GND to select the desired OUT_ slew rate.
10 — 8 —
TIMEOUT
PG/RST Timeout Period Adjust Input. PG/RST asserts high after the
timeout period when all OUT_ exceed their IN_ referenced
threshold. Connect a capacitor from TIMEOUT to GND to set the
desired timeout period. Leave TIMEOUT unconnected for the
default 200µs delay period.
13 — 9 —
MARGIN
Margin Input, Active-Low. Drive MARGIN low to enable margin
mode (see the Margin Input (
MARGIN
) (MAX6880/MAX6882)
section). The MARGIN functionality is disabled (returns to normal
monitoring mode) after MARGIN returns high. MARGIN is internally
pulled up to ABP through a 10µA current source.
P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P19

MAX6880ETG+T

Mfr. #:
Buy MAX6880ETG+T
Manufacturer:
Maxim Integrated
Description:
Supervisory Circuits Triple Power-Sup Sequencer
Lifecycle:
New from this manufacturer.
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