Data Sheet REF19x Series
Rev. L | Page 19 of 28
1V
2ms
5V
ON
OFF
V
OUT
I
L
= 1mA
I
L
= 10mA
10%
100%
0%
90%
00371-016
5V
200mV
200µs
10%
100%
0%
90%
00371-018
Figure 16.
SLEEP
Response Time
Figure 18. Line Transient Response
V
OUT
V
IN
= 15V
1μF
REF19x
3
2
6
4
00371-017
00371-019
REF195 DROPOUT VOLTAGE (V)
0.90 0.20.1 0.4 0.50.3 0.6 0.7 0.8
LOAD CURRENT (mA)
35
30
25
15
20
5
10
0
Figure 17.
SLEEP
Response Time Measurement Circuit
Figure 19. Load Current vs. REF195 Dropout Voltage
REF19x Series Data Sheet
Rev. L | Page 20 of 28
APPLICATIONS INFORMATION
OUTPUT SHORT-CIRCUIT BEHAVIOR
The REF19x family of devices is totally protected from damage
due to accidental output shorts to GND or to V
S
. In the event of
an accidental short-circuit condition, the reference device shuts
down and limits its supply current to 40 mA.
V
S
OUTPUT
SLEEP (SHUTDOWN)
GND
0
0371-020
Figure 20. Simplified Schematic
DEVICE POWER DISSIPATION CONSIDERATIONS
The REF19x family of references is capable of delivering load
currents to 30 mA with an input voltage that ranges from 3.3 V
to 15 V. When these devices are used in applications with large
input voltages, exercise care to avoid exceeding the maximum
internal power dissipation of these devices. Exceeding the
published specifications for maximum power dissipation or
junction temperature can result in premature device failure.
The following formula should be used to calculate the maximum
junction temperature or dissipation of the device:
JA
A
J
D
TT
P
θ
=
where T
J
and T
A
are the junction and ambient temperatures,
respectively; P
D
is the device power dissipation; and θ
JA
is the
device package thermal resistance.
OUTPUT VOLTAGE BYPASSING
For stable operation, low dropout voltage regulators and references
generally require a bypass capacitor connected from their V
OUT
pins to their GND pins. Although the REF19x family of references is
capable of stable operation with capacitive loads exceeding 100 μF,
a 1 μF capacitor is sufficient to guarantee rated performance.
The addition of a 0.1 μF ceramic capacitor in parallel with the
bypass capacitor improves load current transient performance.
For best line voltage transient performance, it is recommended
that the voltage inputs of these devices be bypassed with a 10 μF
electrolytic capacitor in parallel with a 0.1 μF ceramic capacitor.
SLEEP MODE OPERATION
All REF19x devices include a sleep capability that is TTL/CMOS-
level compatible. Internally, a pull-up current source to V
S
is
connected at the
SLEEP
pin. This permits the
SLEEP
pin to be
driven from an open collector/drain driver. A logic low or a 0 V
condition on the
SLEEP
pin is required to turn off the output
stage. During sleep, the output of the references becomes a high
impedance state where its potential would then be determined
by external circuitry. If the sleep feature is not used, it is
recommended that the
SLEEP
pin be connected to V
S
(Pin 2).
BASIC VOLTAGE REFERENCE CONNECTIONS
The circuit in Figure 21 illustrates the basic configuration for
the REF19x family of references. Note the 10 μF/0.1 μF bypass
network on the input and the 1 μF/0.1 μF bypass network on
the output. It is recommended that no connections be made to
Pin 1, Pin 5, Pin 7, and Pin 8. If the sleep feature is not required,
Pin 3 should be connected to V
S
.
NC
NC
V
S
SLEEP
NC
NC
OUTPUT
0.1µF10µF
REF19x
NC = NO CONNECT
8
7
6
5
1
2
3
4
1µF
TANT
0.1µF
+
00371-021
Figure 21. Basic Voltage Reference Connections
MEMBRANE SWITCH-CONTROLLED POWER SUPPLY
With output load currents in the tens of mA, the REF19x family of
references can operate as a low dropout power supply in hand-held
instrument applications. In the circuit shown in Figure 22, a
membrane on/off switch is used to control the operation of the
reference. During an initial power-on condition, the
SLEEP
pin is
held to GND by the 10 kΩ resistor. Recall that this condition (read:
three-state) disables the REF19x output. When the membrane on
switch is pressed, the
SLEEP
pin is momentarily pulled to V
S
,
enabling the REF19x output. At this point, current through the 10 kΩ
resistor is reduced and the internal current source connected to the
SLEEP
pin takes control. Pin 3 assumes and remains at the same
potential as V
S
. When the membrane off switch is pressed, the
SLEEP
pin is momentarily connected to GND, which once
again disables the REF19x output.
ON
OFF
10k
1k
5%
NC
NC
V
S
NC
NC
OUTPUT
REF19x
NC = NO CONNECT
8
7
6
5
1
2
3
4
1µF
TANT
+
00371-022
Figure 22. Membrane Switch Controlled Power Supply
Data Sheet REF19x Series
Rev. L | Page 21 of 28
t
S
t
L
T
L
T
P
25
TIME 25°C TO PEAK
T
SMAX
PREHEAT AREA
MAXIMUM RAMP DOWN RATE = 6°C/s
MAXIMUM RAMP UP RATE = 3°C/s
T
SMIN
T
C
= –5°C
t
P
SUPPLIER
t
P
SUPPLIER
T
P
T
C
T
C
T
C
= –5°C
USER
t
P
USER
T
P
T
C
TEMPERATUR
E
TIME
00371-123
Figure 23. Classification Profile (Not to Scale)
SOLDER HEAT EFFECT
The mechanical stress and heat effect of soldering a part to a
PCB can cause output voltage of a reference to shift in value.
The output voltage of REF195 shifts after the part undergoes the
extreme heat of a lead-free soldering profile, like the one shown
in Figure 23. The materials that make up a semiconductor device
and its package have different rates of expansion and contraction.
The stress on the dice has changed position, causing shift on the
output voltage, after exposed to extreme soldering temperatures.
This shift is similar but more severe than thermal hysteresis.
Typical result of soldering temperature effect on REF19x output
value shift is shown in Figure 24. It shows the output shift due
to soldering and does not include mechanical stress.
0
0371-124
6
5
4
3
2
1
0
–0.16
–0.14
–0.12
–0.10
–0.08
–0.06
–0.04
–0.02
0
0.02
0.04
0.06
0.08
0.10
0.12
0.16
0.14
NUMBER OF UNITS
SHIFT DUE TO SOLDER HEAT EFFECT (%)
Figure 24. Output Shift due to Solder Heat Effect
CURRENT-BOOSTED REFERENCES WITH CURRENT
LIMITING
Whereas the 30 mA rated output current of the REF19x series is
higher than is typical of other reference ICs, it can be boosted to
higher levels, if desired, with the addition of a simple external
PNP transistor, as shown in Figure 25. Full-time current limiting is
used to protect the pass transistor against shorts.
U1
REF196
(SEE TABLE)
R4
2
R1
1k
R2
1.5k
Q2
2N3906
C2
100µF
25V
D1
R3
1.82k
C1
10µF/25V
(TANTALUM)
S
F
C3
0.1µF
F
S
R1
Q1
TIP32A
(SEE TEXT)
+
V
S
= 6
TO 9V
(SEE TEXT)
V
S
COMMON
V
C
V
OUT
COMMON
OUTPUT TABLE
U1
REF192
REF193
REF196
REF194
REF195
V
OUT
(V)
2.5
3.0
3.3
4.5
5.0
+V
OUT
3.3V
@ 150mA
2
6
+
1N4148
(SEE TEXT
ON SLEEP)
3
+
4
00371-023
Figure 25. Boosted 3.3 V Referenced with Current Limiting
In this circuit, the power supply current of reference U1 flowing
through R1 to R2 develops a base drive for Q1, whose collector
provides the bulk of the output current. With a typical gain of 100
in Q1 for 100 mA to 200 mA loads, U1 is never required to furnish
more than a few mA, so this factor minimizes temperature-related
drift. Short-circuit protection is provided by Q2, which clamps
the drive to Q1 at about 300 mA of load current, with values as
shown in Figure 25. With this separation of control and power
functions, dc stability is optimum, allowing most advantageous
use of premium grade REF19x devices for U1. Of course, load

REF191ESZ-REEL

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Manufacturer:
Analog Devices Inc.
Description:
Voltage References 2.048V Prec Micropwr LDO Low VRef
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