74LVC823A All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved.
Product data sheet Rev. 4 — 8 April 2013 12 of 21
NXP Semiconductors
74LVC823A
9-bit D-type flip-flop; 5 V tolerance; positive edge-trigger; 3-state
Measurement points are given in Table 8.
V
OL
and V
OH
are the typical output voltage levels that occur with the output load.
Fig 9. Master reset pulse width, master reset to clock removal time and master reset to output propagation
delay
001aaa852
GND
GND
t
W
t
rem
V
M
V
M
V
I
V
OH
V
OL
V
I
Qn output
CP input
MR input
V
M
V
M
t
PHL
Measurement points are given in Table 8.
V
OL
and V
OH
are the typical output voltage drops that occur with the output load.
Fig 10. 3-state outputs enable and disable times
mgu775
t
PLZ
t
PHZ
outputs
disabled
outputs
enabled
V
Y
V
X
outputs
enabled
Qn output
LOW-to-OFF
OFF-to-LOW
Qn output
HIGH-to-OFF
OFF-to-HIGH
OE input
V
I
V
OL
V
OH
V
CC
V
M
V
M
GND
GND
t
PZL
t
PZH
V
M
V
M
74LVC823A All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved.
Product data sheet Rev. 4 — 8 April 2013 13 of 21
NXP Semiconductors
74LVC823A
9-bit D-type flip-flop; 5 V tolerance; positive edge-trigger; 3-state
Table 8. Measurement points
Supply voltage Input Output
V
CC
V
I
V
M
V
M
V
X
V
Y
1.2 V V
CC
0.5 V
CC
0.5 V
CC
V
OL
+ 0.15 V V
OH
0.15 V
1.65 V to 1.95 V V
CC
0.5 V
CC
0.5 V
CC
V
OL
+ 0.15 V V
OH
0.15 V
2.3 V to 2.7 V V
CC
0.5 V
CC
0.5 V
CC
V
OL
+ 0.15 V V
OH
0.15 V
2.7 V 2.7 V 1.5 V 1.5 V V
OL
+ 0.3 V V
OH
0.3 V
3.0 V to 3.6 V 2.7 V 1.5 V 1.5 V V
OL
+ 0.3 V V
OH
0.3 V
Test data is given in Table 9.
Definitions for test circuit:
R
L
= Load resistance.
C
L
= Load capacitance including jig and probe capacitance.
R
T
= Termination resistance should be equal to output impedance Z
o
of the pulse generator.
V
EXT
= External voltage for measuring switching times.
Fig 11. Load circuitry for switching times
V
M
V
M
t
W
t
W
10 %
90 %
0 V
V
I
V
I
negative
pulse
positive
pulse
0 V
V
M
V
M
90 %
10 %
t
f
t
r
t
r
t
f
001aae331
V
EXT
V
CC
V
I
V
O
DUT
C
L
R
T
R
L
R
L
G
Table 9. Test data
Supply voltage Input Load V
EXT
V
I
t
r
, t
f
C
L
R
L
t
PLH
, t
PHL
t
PLZ
, t
PZL
t
PHZ
, t
PZH
1.2 V V
CC
2 ns 30 pF 1 k open 2 V
CC
GND
1.65 V to 1.95 V V
CC
2 ns 30 pF 1 k open 2 V
CC
GND
2.3 V to 2.7 V V
CC
2 ns 30 pF 500 open 2 V
CC
GND
2.7V 2.7V 2.5 ns 50 pF 500 open 2 V
CC
GND
3.0Vto3.6V 2.7V 2.5 ns 50 pF 500 open 2 V
CC
GND
74LVC823A All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved.
Product data sheet Rev. 4 — 8 April 2013 14 of 21
NXP Semiconductors
74LVC823A
9-bit D-type flip-flop; 5 V tolerance; positive edge-trigger; 3-state
12. Package outline
Fig 12. Package outline SOT137-1 (SO24)
UNIT
A
max.
A
1
A
2
A
3
b
p
cD
(1)
E
(1) (1)
eH
E
LL
p
Q
Z
ywv θ
REFERENCES
OUTLINE
VERSION
EUROPEAN
PROJECTION
ISSUE DATE
IEC JEDEC JEITA
mm
inches
2.65
0.3
0.1
2.45
2.25
0.49
0.36
0.32
0.23
15.6
15.2
7.6
7.4
1.27
10.65
10.00
1.1
1.0
0.9
0.4
8
0
o
o
0.25 0.1
DIMENSIONS (inch dimensions are derived from the original mm dimensions)
Note
1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included.
1.1
0.4
SOT137-1
X
12
24
w M
θ
A
A
1
A
2
b
p
D
H
E
L
p
Q
detail X
E
Z
c
L
v M
A
13
(A )
3
A
y
0.25
075E05 MS-013
pin 1 index
0.1
0.012
0.004
0.096
0.089
0.019
0.014
0.013
0.009
0.61
0.60
0.30
0.29
0.05
1.4
0.055
0.419
0.394
0.043
0.039
0.035
0.016
0.01
0.25
0.01
0.004
0.043
0.016
0.01
e
1
0 5 10 mm
scale
SO24: plastic small outline package; 24 leads; body width 7.5 mm
SOT137-1
99-12-27
03-02-19

74LVC823ABQ,115

Mfr. #:
Manufacturer:
Nexperia
Description:
IC FF D-TYPE SNGL 9BIT 24DHVQFN
Lifecycle:
New from this manufacturer.
Delivery:
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