AD9985
Rev. 0 | Page 30 of 32
PLL
Place the PLL loop filter components as close to the FILT pin as
possible.
Do not place any digital or other high frequency traces near
these components.
Use the values suggested in the data sheet with 10% tolerances
or less.
OUTPUTS (BOTH DATA AND CLOCKS)
Try to minimize the trace length that the digital outputs have to
drive. Longer traces have higher capacitance, which requires
more current, which causes more internal digital noise.
Shorter traces reduce the possibility of reflections.
Adding a series resistor of value 22 Ω to 100 Ω can suppress
reflections, reduce EMI, and reduce the current spikes inside of
the AD9985. However, if 50 Ω traces are used on the PCB, the
data outputs should not need resistors. A 22 Ω resistor on the
DATACK output should provide good impedance matching
that will reduce reflections. If series resistors are used, place
them as close to the AD9985 pins as possible (although try not
to add vias or extra length to the output trace in order to get the
resistors closer).
If possible, limit the capacitance that each of the digital outputs
drives to less than 10 pF. This can easily be accomplished by
keeping traces short and by connecting the outputs to only one
device. Loading the outputs with excessive capacitance will
increase the current transients inside of the AD9985, creating
more digital noise on its power supplies.
DIGITAL INPUTS
The digital inputs on the AD9985 were designed to work with
3.3 V signals, but are tolerant of 5.0 V signals. Therefore, no
extra components need to be added if using 5.0 V logic.
Any noise that gets onto the Hsync input trace will add jitter to
the system. Therefore, minimize the trace length and do not run
any digital or other high frequency traces near it.
VOLTAGE REFERENCE
Bypass with a 0.1 µF capacitor. Place as close to the AD9985 pin
as possible. Make the ground connection as short as possible.
