31
Integrated
Circuit
Systems, Inc.
ICS953002
0924—11/18/09
Electrical Characteristics - SRC/SATA/PCIEX 0.7V Current Mode Differential Pair
PARAMETER SYMBOL CONDITIONS* MIN TYP MAX UNITS Notes
Current Source Output Impedance Zo
V
O
= V
x
3000 1
Voltage High VHigh 660 850 mV 1,3
Voltage Low VLow -150 150 mV 1,3
Max Voltage Vovs 1150 mV 1
Min Voltage Vuds -300 mV 1
Crossing Voltage (abs) Vx(abs) 250 550 mV 1
Crossing Voltage (var) d-Vx
Variation of crossing over all
ed
g
es
140 mV 1
Long Accuracy ppm see Tperiod min-max values -300 300 ppm 1,2
100.00MHz nominal 9.9970 10.0030 ns 2
100.00MHz spread 9.9970 10.0533 ns 2
Absolute min period Tabsmin 100.00MHz nominal/spread 9.8720 ns 1,2
Rise Time
t
r
V
OL
= 0.175V, V
OH
= 0.525V
175 700 ps 1
Fall Time
t
f
V
OH
= 0.525V V
OL
= 0.175V
175 700 ps 1
Rise Time Variation
d-t
r
V
OL
= 0.175V, V
OH
= 0.525V
125 ps 1
Fall Time Variation
d-t
f
V
OH
= 0.525V V
OL
= 0.175V
125 ps 1
Duty Cycle
d
t3
Measurement from differential
wavefrom
45 55 % 1
Skew
t
sk3
V
T
= 50%
250 ps 1
Jitter, Cycle to cycle
t
jcyc-cyc
Measurement from differential
wavefrom
125 ps 1
*T
A
= 0 - 70°C; V
DD
= 3.3 V +/-5%; C
L
=2pF, R
S
=33.2
, R
P
=49.9
Ω, Ι
REF
= 475Ω
1
Guaranteed by design and characterization, not 100% tested in production.
2
All Long Term Accuracy and Clock Period specifications are guaranteed assuming that REFOUT is at 14.31818MHz
3
I
REF
= V
DD
/(3xR
R
). For R
R
= 475 (1%), I
REF
= 2.32mA. I
OH
= 6 x I
REF
and V
OH
= 0.7V @ Z
O
=50.
Statistical measurement on sin
g
le
ended signal
Measurement on single ended
signal using absolute value.
Average period Tperiod
Electrical Characteristics - PCICLK/PCICLK_F
PARAMETER SYMBOL CONDITIONS* MIN TYP MAX UNITS
NOTES
Output Impedance
R
DSP
V
O
= V
DD
*(0.5)
12 55
1
Output High Voltage
V
OH
I
OH
= -1 mA
2.4 V
1
Output Low Voltage
V
OL
I
OL
= 1 mA
0.55 V
1
V
OH
@MIN = 1.0 V
-33 mA 1
V
OH
@MAX = 3.135 V
-33 mA 1
V
OL
@ MIN = 1.95 V
30 mA 1
V
OL
@ MAX = 0.4 V
38 mA 1
Edge Rate
t
slewr/f
Rising/Falling edge rate 1 4 V/ns 1
Rise Time
t
r
V
OL
= 0.4 V, V
OH
= 2.4 V
0.5 2 ns
1
Fall Time
t
f
V
OH
= 2.4 V, V
OL
= 0.4 V
0.5 2 ns
1
Duty Cycle
d
t1
V
T
= 1.5 V
45 55
%1
Group Skew
t
skew
V
T
= 1.5 V
500 ps
1
Jitter, Cycle to cycle
t
jcyc-cyc
V
T
= 1.5 V
500 ps
1
*TA = 0 - 70°C; Supply Voltage VDD = 3.3 V +/-5%, CL = 20 pF with Rs = 7 (unless otherwise specified)
1
Guaranteed b
y
desi
g
n and characterization, not 100% tested in
p
roduction.
Output High Current
I
OH
Output Low Current
I
OL
32
Integrated
Circuit
Systems, Inc.
ICS953002
0924—11/18/09
Electrical Characteristics - 48MHz/USB48MHz/24_48MHz
PARAMETER SYMBOL CONDITIONS* MIN TYP MAX UNITS
NOTES
Long Accuracy ppm see Tperiod min-max values -100 100 ppm 1
Clock period
T
period
48.00MHz output nominal 20.8313 20.8354 ns
Output Impedance
R
DSP
V
O
= V
DD
*(0.5)
12 55
1
Output High Voltage
V
OH
I
OH
= -1 mA
2.4 V
1
Output Low Voltage
V
OL
I
OL
= 1 mA
0.55 V
1
V
OH
@MIN = 1.0 V
-33 mA 1
V
OH
@MAX = 3.135 V
-33 mA 1
V
OL
@ MIN = 1.95 V
30 mA 1
V
OL
@ MAX = 0.4 V
38 mA 1
Edge Rate
t
slewr/f
Rising/Falling edge rate 1 4 V/ns 1
Edge Rate
t
slewr/f_USB
USB48 Rising/Falling edge rate 1 2 V/ns 1
Rise Time
t
r
V
OL
= 0.4 V, V
OH
= 2.4 V
0.5 2 ns
1
Fall Time
t
f
V
OH
= 2.4 V, V
OL
= 0.4 V
0.5 2 ns
1
Rise Time
t
r_USB
V
OL
= 0.4 V, V
OH
= 2.4 V
12ns
1
Fall Time
t
f_USB
V
OH
= 2.4 V, V
OL
= 0.4 V
12ns
1
Duty Cycle
d
t1
V
T
= 1.5 V
45 55
%1
Group Skew
t
skew
V
T
= 1.5 V
250 ps
1
Jitter, Cycle to cycle
t
jcyc-cyc
V
T
= 1.5 V
500 ps
1
*TA = 0 - 70°C; Supply Voltage VDD = 3.3 V +/-5%, CL = 20 pF with Rs = 7
(Rs is used in USB48MHz test only)
1
Guaranteed b
y
desi
g
n and characterization, not 100% tested in
p
roduction.
Output High Current
I
OH
Output Low Current
I
OL
Electrical Characteristics - AGPCLK/3V66
PARAMETER SYMBOL CONDITIONS* MIN TYP MAX UNITS
NOTES
Output Impedance
R
DSP
V
O
= V
DD
*(0.5)
12 55
1
Output High Voltage
V
OH
I
OH
= -1 mA
2.4 V
1
Output Low Voltage
V
OL
I
OL
= 1 mA
0.55 V
1
V
OH
@MIN = 1.0 V
-33 mA 1
V
OH
@MAX = 3.135 V
-33 mA 1
V
OL
@ MIN = 1.95 V
30 mA 1
V
OL
@ MAX = 0.4 V
38 mA 1
Rise Time
t
r
V
OL
= 0.4 V, V
OH
= 2.4 V
0.5 2 ns
1
Fall Time
t
f
V
OH
= 2.4 V, V
OL
= 0.4 V
0.5 2 ns
1
Duty Cycle
d
t1
V
T
= 1.5 V
45 55
%1
Group Skew
t
skew
V
T
= 1.5 V
150 ps
1
Jitter, Cycle to cycle
t
jcyc-cyc
V
T
= 1.5 V
250 ps
1
*TA = 0 - 70°C; Supply Voltage VDD = 3.3 V +/-5%, CL = 10-30 pF (unless otherwise specified)
1
Guaranteed b
y
desi
g
n and characterization, not 100% tested in
p
roduction.
Output Low Current
I
OL
Output High Current
I
OH
33
Integrated
Circuit
Systems, Inc.
ICS953002
0924—11/18/09
Electrical Characteristics - REF-14.318MHz
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS Notes
Long Accuracy ppm see Tperiod min-max values -300 300 ppm 1,2
Clock period T
p
eriod
14.318MHz output nominal 69.8270 69.8550 ns 2
Output High Voltage V
OH
I
OH
= -1 mA 2.4 V 1
Output Low Voltage V
OL
I
OL
= 1 mA 0.4 V 1
Output High Current I
OH
V
OH
@MIN = 1.0 V,
V
OH
@MAX = 3.135 V
-29 -23 mA 1
Output Low Current I
OL
V
OL
@MIN = 1.95 V,
V
OL
@MAX = 0.4 V
29 27 mA 1
Edge Rate t
slewr/f
Rising/Falling edge rate 1 4 V/ns 1
Rise Time t
r1
V
OL
= 0.4 V, V
OH
= 2.4 V 1 2 ns 1
Fall Time t
f1
V
OH
= 2.4 V, V
OL
= 0.4 V 1 2 ns 1
Skew t
sk1
V
T
= 1.5 V Inverted ps 3
Duty Cycle d
t1
V
T
= 1.5 V 45 55 % 1
Jitter t
j
c
y
c-c
y
c
V
T
= 1.5 V 1000 ps 1
*TA = 0 - 70°C; Supply Voltage VDD = 3.3 V +/-5%, CL = 20 pF with Rs = 7
(Rs is used in USB48MHz test only)
1
Guaranteed by design and characterization, not 100% tested in production.
2
All Long Term Accuracy and Clock Period specifications are guaranteed assuming that REFOUT is at 14.31818MHz
3
The REF outputs are inverted with respect to each other. The exact skew value is not critical.

953002CFLF

Mfr. #:
Manufacturer:
IDT
Description:
Clock Generators & Support Products PC MAIN CLOCK
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
T/T Paypal Visa MoneyGram Western Union

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