UPD1002
DS00001760B-page 34 2014 Microchip Technology Inc.
3.5.4.1 Erase Example
To perform a SCTR_ERASE, 32BLK_ERASE, or 64BLK_ERASE, the device writes 0x20, 0x52, or 0xD8, respectively
to the first byte of the command buffer, followed by a 3-byte address. The length of the transfer is set to 4 bytes. To do
this, the device first drops SPI_ROM_CE_N, then counts out 8 clocks. It then puts out the 8 bits of command, followed
by 24 bits of address of the location to be erased on the SPI_ROM_DO pin. When the transfer is complete, the
SPI_ROM_CE_N goes high, while the SPI_ROM_DI line is ignored in this example.
3.5.4.2 Byte Program Example
To perform a Byte Program, the device writes 0x02 to the first byte of the command buffer, followed by a 3-byte address
of the location that will be written to, and one data byte. The length of the transfer is set to 5 bytes. The device first drops
SPI_ROM_CE_N, 8 bits of command are clocked out, followed by 24 bits of address, and one byte of data on the
SPI_ROM_DO pin. The SPI_ROM_DI line is not used in this example.
FIGURE 3-7: SPI ROM ERASE SEQUENCE
FIGURE 3-8: SPI ROM BYTE PROGRAM
SPI_ROM_CE_N
SPI_ROM_CLK
16
23
24
31
15
123
405
7
6
ADD.
SPI_ROM_DO
SPI_ROM_DI
8
Command
MSB MSB
ADD. ADD.
HIGH IMPEDANCE
SPI_ROM_CE_N
SPI_ROM_CLK
16
23
24
31
15
39
123
405
7
6
0x00
SPI_ROM_DO
SPI_ROM_DI
8
0xDB
MSB MSB
0xFE
/0xFF
Data
MSB LSB
32
HIGH IMPEDANCE
0xBF
