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S5U13706P00C100

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24P25-P27P28-P29
Epson Research and Development Page 25
Vancouver Design Center
S5U13706P00C100 Evaluation Board User Manual S1D13706
Issue Date: 2009/03/03 X31B-G-021-01
Revision 1.1
Figure 9-4: S5U13706P00C100 Schematics (4 of 5)
5
5
4
4
3
3
2
2
1
1
D
D
C
C
B B
A A
AB[16:0]
DB5
DB[15:0]
DB8
DB4
DB12
DB3
DB11
DB2
DB13
DB1
DB10
DB0
DB9
DB14
DB6 DB7
DB15
AB0
AB2
AB4
AB6
AB8
AB10
AB12
AB14
AB16
AB5
AB7
AB1
AB3
AB11
AB9
AB13
AB15
AD27
AD28
AD21
AD3
AD9
AD6
AD22
AD15
AD13
AD4
AD1
AD23
AD10
AD25
AD11
AD20
AD7
AD0
AD8
AD16
AD18
AD[31:0]
AD30
AD2
AD5
AD12
AD31
AD29
AD14
AD17
AD24
AD19
AD26
+5V +5V
+12V
+12V
+12V
+5V+5V +5V +12V
+12V+5V +5V
AB[16:0]
1,5
RD/WR#
1,5
BUSCLK
1,2,5
BS#
1,5
RD#
1,5
WE0#
1,5
WE1#
1,5
CS#
1,5
M/R#
1,5
WAIT#
1,5
RESET#
1,5
DB[15:0]
1,5
STOP#
5
PAR5
SERR#
5
IDSEL
5
RST#
5
C/BE0#
5
C/BE1#
5
DEVSEL#
5
CLK
5
C/BE2#
5
TRDY#
5
FRAME#
5
AD[31:0]
5
C/BE3#
5
IRDY#
5
PERR#
5
Title
Size Document Number Rev
Date:
Sheet of
<Doc>
S5U13706P00C100 - Host Bus Connectors
B
45Monday, March 05, 2007
Title
Size Document Number Rev
Date:
Sheet of
<Doc>
S5U13706P00C100 - Host Bus Connectors
B
45Monday, March 05, 2007
Title
Size Document Number Rev
Date:
Sheet of
<Doc>
S5U13706P00C100 - Host Bus Connectors
B
45Monday, March 05, 2007
Place close to PCIB pin 61 & 62 Place close to PCIA pin 2
Place close to PCIB pin 5 & 6
+C36
33u 20V
+C36
33u 20V
PCIB1
PCI-B
PCIB1
PCI-B
-12V
1
TCK
2
GND
3
TDO
4
+5V
5
+5V
6
INTB#
7
INTD#
8
PRSNT#1
9
RESERVED
10
PRSNT#2
11
RESERVED
14
GND
15
CLK
16
GND
17
REQ#
18
+VI/O
19
AD31
20
AD29
21
GND
22
AD27
23
AD25
24
+3.3V
25
C/BE3#
26
AD23
27
GND
28
AD21
29
AD19
30
+3.3V
31
AD17
32
C/BE2#
33
GND
34
IRDY#
35
+3.3V
36
DEVSEL#
37
GND
38
LOCK#
39
PERR#
40
+3.3V
41
SERR#
42
3.3V
43
C/BE1#
44
AD14
45
GND
46
AD12
47
AD10
48
GND
49
AD8
52
AD7
53
+3.3V
54
AD5
55
AD3
56
GND
57
AD1
58
+VI/O
59
ACK64#
60
+5V
61
+5V
62
PCIA1
PCI-A
PCIA1
PCI-A
TRST#
1
+12V
2
TMS
3
TDI
4
+5V
5
INTA#
6
INTC#
7
+5V
8
RESERVED
9
+VI/O
10
RESERVED
11
RESERVED
14
RST#
15
+VI/O
16
GNT#
17
GND
18
RESERVED
19
AD30
20
+3.3V
21
AD28
22
AD26
23
GND
24
AD24
25
IDSEL
26
+3.3V
27
AD22
28
AD20
29
GND
30
AD18
31
AD16
32
+3.3V
33
FRAME#
34
GND
35
TRDY#
36
GND
37
STOP#
38
+3.3V
39
SDONE
40
SBO#
41
GND
42
PAR
43
AD15
44
+3.3V
45
AD13
46
AD11
47
GND
48
AD9
49
C/BE0#
52
+3.3V
53
AD6
54
AD4
55
GND
56
AD2
57
AD0
58
+VI/O
59
REQ64#
60
+5V
61
+5V
62
+C33
33u 20V
+C33
33u 20V
+C34
68u 10V
+C34
68u 10V
+C35
68u 10V
+C35
68u 10V
H4
HEADER 17X2
H4
HEADER 17X2
1 2
3 4
5 6
7 8
9 10
11 12
13 14
15 16
17 18
19 20
21 22
23 24
25 26
27 28
29 30
31 32
33 34
H3
HEADER 17X2
H3
HEADER 17X2
1 2
3 4
5 6
7 8
9 10
11 12
13 14
15 16
17 18
19 20
21 22
23 24
25 26
27 28
29 30
31 32
33 34
+C37
68u 10V
+C37
68u 10V
Page 26 Epson Research and Development
Vancouver Design Center
S1D13706 S5U13706P00C100 Evaluation Board User Manual
X31B-G-021-01 Issue Date: 2009/03/03
Revision 1.1
Figure 9-5: S5U13706P00C100 Schematics (5 of 5)
A
A
B
B
C
C
D
D
E
E
4 4
3 3
2 2
1 1
AD13
AD9
AD15
AD16
AD18
AD23
AD10
AD12
AD19
AD24
AD8
AD20
AD22
AD25
AD17
AD11
AD21
AD14
AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD27
AD26
AD29
AD28
AD30
AD31
DB15
DB14
DB13
DB12
DB11
DB10
DB9
DB2
DB1
DB0
DB6
DB5
DB3
DB4
DB7
DB8
AB15
AB16
AB9
AB[16:0]
AB1
AB0
AB11
AB2
AB12
AB4
AB10
AB6
AB13
AB8
AB5
AB7
AB14
AB3
DCLK
DATAnSTATUS
CONF_DONE
nSTATUS
CONF_DONE
DCLK
DATA
AD[31:0]
DB[15:0]
+5V
+5V
+5V
+5V
+5V
+5V
+5V
+5V
+5V
+5V
+5V
+5V
+5V
+5V
+5V
+3.3V
+3.3V +3.3V +3.3V +3.3V
+3.3V
TRDY#
4
STOP#
4
PAR
4
IRDY#
4
DEVSEL#
4
PERR#
4
SERR#
4
AB[16:0]
1,4
M/R#
1,4
WE0#
1,4
DB[15:0]
1,4
BS#
1,4
RD#
1,4
WE1#
1,4
RD/WR#
1,4
CS#
1,4
BUSCLK
1,2,4
RESET#
1,4
C/BE0#
4
IDSEL
4
C/BE3#
4
C/BE1#
4
WAIT#
1,4
FRAME#
4
C/BE2#
4
AD[31:0]
4
RST#
4
CLK
4
nCONFIG
1
Title
Size Document Number Rev
Date:
Sheet of
<Doc>
S5U13706P00C100 - FPGA--6016
B
55Monday, March 05, 2007
Title
Size Document Number Rev
Date:
Sheet of
<Doc>
S5U13706P00C100 - FPGA--6016
B
55Monday, March 05, 2007
Title
Size Document Number Rev
Date:
Sheet of
<Doc>
S5U13706P00C100 - FPGA--6016
B
55Monday, March 05, 2007
FPGA configuration EPROM
Not Populated
U14 EPF6016TC144-2U14 EPF6016TC144-2
IO1
1
IO2
2
IO3
3
nCE
4
GND
5
Vccint
6
Vccio
7
IO8
8
IO9
9
IO10
10
IO11
11
IO12
12
IO13
13
IO14
14
IO15
15
IO16
16
I17
17
GND
18
Vccio
19
I20
20
IO21
21
IO22
22
IO23
23
IO24
24
IO25
25
IO26
26
IO27
27
IO28
28
IO29
29
GND
30
Vccint
31
Vccio
32
MSEL
33
IO34
34
IO35
35
IO36
36
IO37
37
IO38
38
IO39
39
IO40
40
IO41
41
IO42
42
IO43
43
IO44
44
IO45
45
IO46
46
IO47
47
IO48
48
IO49
49
IO50
50
IO51
51
IO52
52
nCONFIG
53
GND
54
Vccio
55
nSTATUS
56
IO57
57
IO58
58
IO59
59
IO60
60
IO61
61
IO62
62
IO63
63
IO64
64
IO65
65
IO66
66
IO67
67
IO68
68
IO69
69
IO70
70
IO71
71
IO72
72
IO73
73
IO74
74
IO75
75
GND
76
Vccint
77
Vccio
78
IO79
79
IO80
80
IO81
81
IO82
82
IO83
83
IO84
84
IO85
85
IO86
86
IO87
87
IO88
88
I89
89
GND
90
Vccio
91
I92
92
IO93
93
IO94
94
IO95
95
IO96
96
IO97
97
IO98
98
IO99
99
IO100
100
IO101
101
GND
102
Vccint
103
Vccio
104
CONF_DONE
105
IO106
106
IO107
107
IO108
108
IO109
109
IO110
110
IO111
111
IO112
112
IO113
113
IO114
114
IO115
115
IO116
116
IO117
117
IO118
118
IO119
119
IO120
120
IO121
121
IO122
122
IO123
123
IO124
124
DATA
125
GND
126
Vccio
127
DCLK
128
IO129
129
IO130
130
IO131
131
IO132
132
IO133
133
IO134
134
IO135
135
IO136
136
IO137
137
IO138
138
IO139
139
IO140
140
IO141
141
IO142
142
IO143
143
IO144
144
C38
0.22u
C38
0.22u
R36
15K
R36
15K
R37
15K
R37
15K
R38
15K
R38
15K
R39
15K
R39
15K
R33
15K
R33
15K
U15
EPC1441PC8
U15
EPC1441PC8
DATA
1
DCLK
2
OE
3
nCS
4
GND
5
nCASC
6
VCC
7
VCC
8
R34
1K
R34
1K
R35
1K
R35
1K
R40
1K
R40
1K
S1
SW DIP-4
S1
SW DIP-4
1
2
3
4
8
7
6
5
C40
0.22u
C40
0.22u
C39
0.22u
C39
0.22u
C44
0.22u
C44
0.22u
C42
0.22u
C42
0.22u
C41
0.22u
C41
0.22u
C43
0.22u
C43
0.22u
C46
0.22u
C46
0.22u
C45
0.22u
C45
0.22u
R32
100K
R32
100K
Epson Research and Development Page 27
Vancouver Design Center
S5U13706P00C100 Evaluation Board User Manual S1D13706
Issue Date: 2009/03/03 X31B-G-021-01
Revision 1.1
10 Board Layout
Figure 10-1: S5U13706P00C100 Board Layout
P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24P25-P27P28-P29

S5U13706P00C100

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Manufacturer:
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Description:
Display Development Tools S1D13706F00A Evaluation Board
Lifecycle:
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