AD5318ARUZ Datasheet AD5328ARUZ, AD5328BRUZ-REEL7, AD5308ARUZ | P13-P15

AD5308/AD5318/AD5328

Rev. F | Page 13 of 28

TERMINOLOGY

Relative Accuracy

For the DAC, relative accuracy or integral nonlinearity (INL) is

a measure of the maximum deviation, in LSB, from a straight

line passing through the endpoints of the DAC transfer func-

tion. Typical INL vs. code plots can be seen in Figure 4, Figure 5,

and Figure 6.

Differential Nonlinearity

Differential nonlinearity (DNL) is the difference between the

measured change and the ideal 1 LSB change between any two

adjacent codes. A specified differential nonlinearity of ±1 LSB

maximum ensures monotonicity. This DAC is guaranteed

monotonic by design. Typical DNL vs. code plots can be seen

in Figure 7, Figure 8, and Figure 9.

Offset Error

This is a measure of the offset error of the DAC and the output

amplifier (see Figure 27 and Figure 28). It can be negative or

positive, and is expressed in millivolts.

Gain Error

This is a measure of the span error of the DAC. It is the devia-

tion in slope of the actual DAC transfer characteristic from the

ideal expressed as a percentage of the full-scale range.

Offset Error Drift

This is a measure of the change in offset error with changes in

temperature. It is expressed in (ppm of full-scale range)/°C.

Gain Error Drift

This is a measure of the change in gain error with changes in

temperature. It is expressed in (ppm of full-scale range)/°C.

DC Power Supply Rejection Ratio (PSRR)

This indicates how the output of the DAC is affected by changes

in the supply voltage. PSRR is the ratio of the change in V

OUT

a change in V

for full-scale output of the DAC. It is measured

in decibels. V

REF

is held at 2 V and V

is varied ±10%.

DC Crosstalk

This is the dc change in the output level of one DAC in response

to a change in the output of another DAC. It is measured with a

full-scale output change on one DAC while monitoring another

DAC. It is expressed in microvolts.

Reference Feedthrough

This is the ratio of the amplitude of the signal at the DAC out-

put to the reference input when the DAC output is not being

updated (that is,

LDAC

is high). It is expressed in decibels.

Channel-to-Channel Isolation

This is the ratio of the amplitude of the signal at the output of

one DAC to a sine wave on the reference input of another DAC.

It is measured in decibels.

Major-Code Transition Glitch Energy

Major-code transition glitch energy is the energy of the impulse

injected into the analog output when the code in the DAC

glitch in nV-sec and is measured when the digital code is

changed by 1 LSB at the major carry transition (011 ... 11 to

100 ... 00 or 100 ... 00 to 011 ... 11).

Digital Feedthrough

Digital feedthrough is a measure of the impulse injected into

the analog output of a DAC from the digital input pins of the

device, but is measured when the DAC is not being written to

(

SYNC

held high). It is specified in nV-sec and is measured

with a full-scale change on the digital input pins, that is, from

all 0s to all 1s and vice versa.

Digital Crosstalk

This is the glitch impulse transferred to the output of one DAC

at midscale in response to a full-scale code change (all 0s to all

1s and vice versa) in the input register of another DAC. It is

measured in standalone mode and is expressed in nV-sec.

Analog Crosstalk

This is the glitch impulse transferred to the output of one DAC

due to a change in the output of another DAC. It is measured by

loading one of the input registers with a full-scale code change

(all 0s to all 1s and vice versa) while keeping

LDAC

high. Then

pulse

LDAC

low and monitor the output of the DAC whose digital

code is not changed. The area of the glitch is expressed in nV-sec.

DAC-to-DAC Crosstalk

This is the glitch impulse transferred to the output of one DAC

due to a digital code change and subsequent output change of

another DAC. This includes both digital and analog crosstalk.

It is measured by loading one of the DACs with a full-scale code

change (all 0s to all 1s and vice versa) with

LDAC

low and

monitoring the output of another DAC. The energy of the glitch

is expressed in nV-sec.

Multiplying Bandwidth

The amplifiers within the DAC have a finite bandwidth. The

multiplying bandwidth is a measure of this. A sine wave on the

reference (with full-scale code loaded to the DAC) appears on

the output. The multiplying bandwidth is the frequency at

which the output amplitude falls to 3 dB below the input.

Total Harmonic Distortion (THD)

This is the difference between an ideal sine wave and its atten-

uated version using the DAC. The sine wave is used as the refer-

ence for the DAC and the THD is a measure of the harmonics

present on the DAC output. It is measured in decibels.

AD5308/AD5318/AD5328

Rev. F | Page 14 of 28

02812-004

DAC CODE

ACTUAL

GAIN ERROR

PLUS

OFFSET ERROR

OUTPUT

VOLTAGE

NEGATIVE

OFFSET

ERROR

NEGATIVE

OFFSET

ERROR

AMPLIFIER

FOOTROOM

DEAD

BAND

DES

IDEAL

Figure 27. Transfer Function with Negative Offset (V

REF

= V

)

DAC CODE

FULL SCALE

ACTUAL

IDEAL

POSITIVE

OFFSET

ERROR

OUTPUT

VOLTAGE

GAIN ERROR

PLUS

OFFSET ERROR

UPPER

DEADBAND

CODES

02812-005

Figure 28. Transfer Function with Positive Offset

AD5308/AD5318/AD5328

Rev. F | Page 15 of 28

THEORY OF OPERATION

The AD5308/AD5318/AD5328 are octal resistor-string DACs

fabricated on a CMOS process with resolutions of 8, 10, and

12 bits, respectively. Each contains eight output buffer ampli-

fiers and is written to via a 3-wire serial interface. They operate

from single supplies of 2.5 V to 5.5 V and the output buffer

amplifiers provide rail-to-rail output swing with a slew rate of

0.7 V/µs. DAC A, DAC B, DAC C, and DAC D share a common

reference input, V

REF

ABCD. DAC E, DAC F, DAC G, and DAC H

share a common reference input, V

REF

EFGH. Each reference

input can be buffered to draw virtually no current from the

reference source, can be unbuffered to give a reference input

range from 0.25 V to V

, or can come from V

. The devices

have a power-down mode in which all DACs can be turned off

individually with a high impedance output.

DIGITAL-TO-ANALOG CONVERTER

The architecture of one DAC channel consists of a resistor

string DAC followed by an output buffer amplifier. The voltage

at the V

REF

pin provides the reference voltage for the corre-

sponding DAC. Figure 29 shows a block diagram of the DAC

architecture. Since the input coding to the DAC is straight

binary, the ideal output voltage is given by

REF

OUT

where:

D is the decimal equivalent of the binary code that is loaded to

the DAC register:

0 to 255 for AD5308 (8 bits)

0 to 1023 for AD5318 (10 bits)

0 to 4095 for AD5328 (12 bits)

N is the DAC resolution.

INPUT

OUTPUT

BUFFER AMPLIFIER

REFERENCE

BUFFER

GAIN MODE

(GAIN = +1 OR +2)

OUT

REF

ABCD

BUF

RESISTOR

STRING

DAC

02812-029

Figure 29. Single DAC Channel Architecture

DAC Reference Inputs

There is a reference pin for each quad of DACs. The reference

inputs can be buffered from V

, or unbuffered. The advantage

with the buffered input is the high impedance it presents to the

voltage source driving it. However, if the unbuffered mode is

used, the user can have a reference voltage as low as 0.25 V and

as high as V

since there is no restriction due to the headroom

and footroom of the reference amplifier.

If there is a buffered reference in the circuit (for example, the

REF192), there is no need to use the on-chip buffers of the

AD5308/AD5318/AD5328. In unbuffered mode, the input

impedance is still large at typically 45 k per reference input

for 0 V to V

REF

mode and 22 k for 0 V to 2 V

REF

mode.

RESISTOR STRING

The resistor-string section is shown in Figure 30. It is simply a

string of resistors, each of value R. The digital code loaded to

the DAC register determines at which node on the string the

voltage is tapped off to be fed into the output amplifier. The

voltage is tapped off by closing one of the switches connecting

the string to the amplifier. Because it is a string of resistors, it is

guaranteed monotonic.

02812-030

TO OUTPUT

AMPLIFIER

Figure 30. Resistor String

OUTPUT AMPLIFIER

The output buffer amplifier is capable of generating output

voltages to within 1 mV of either rail. Its actual range depends

on the value of V

REF

, the gain of the output amplifier, the offset

error, and the gain error.

If a gain of 1 is selected (gain bit = 0), the output range is

0.001 V to V

REF

If a gain of 2 is selected (gain bit = 1), the output range is

0.001 V to 2 V

REF

. Because of clamping, however, the maximum

output is limited to V

− 0.001 V.

The output amplifier is capable of driving a load of 2 k to

GND or V

, in parallel with 500 pF to GND or V

. The

source and sink capabilities of the output amplifier can be seen

in the plot in Figure 14.

The slew rate is 0.7 V/s with a half-scale settling time to

±0.5 LSB (at 8 bits) of 6 s.

P1-P3 P4-P6 P7-P9 P10-P12 P13-P15 P16-P18 P19-P21 P22-P24 P25-P27 P28-P28

AD5318ARUZ

Mfr. #:

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Manufacturer:

Analog Devices Inc.

Description:

Digital to Analog Converters - DAC OCTAL 10 BIT SPI MICROPWR IC

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AD5318ARUZ

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