1. General description
The PCA9703 is a low power 18 V tolerant SPI General Purpose Input (GPI) shift register
designed to monitor the status of switch inputs. It generates an interrupt when one or
more of the switch inputs change state but allows selected inputs to not generate
interrupts using the interrupt masking feature. The input level is recognized as a HIGH
when it is greater than 0.8 V
DD
and as a LOW when it is less than 0.55 V
DD
(minimum
LOW threshold of 2.5 V at 5 V node). The PCA9703 can monitor up to 16 switch inputs.
The falling edge of the CS
pin samples the input port status and clears the interrupt. When
CS
is LOW, the rising edge of the SCLK loads the shift register and shifts the value out of
the shift register. The serial input is sampled on the falling edge of SCLK. The contents of
the shift register are loaded into the interrupt mask register of the device on the rising
edge of CS
.
Each of the input ports has a 18 V breakdown ESD protection circuit, which dumps the
ESD/overvoltage current to ground. When used with a series resistor (minimum 100 k),
the input can connect to a 12 V battery and support double battery, reverse battery, 27 V
jump start and 40 V load dump conditions in automotive applications. Higher voltages can
be tolerated on the inputs depending on the series resistor used to limit the input current.
The INT_EN pin is used to both enable the GPI pins and to enable the INT
output pin to
minimize battery drain in cyclically supplied pull-up or pull-down applications. The SDIN
pull-down prevents floating nodes when the device is used in daisy-chain applications.
With both the high breakdown voltage and high ESD, this device is useful for both
automotive (AEC-Q100 compliance available) and mobile applications.
2. Features and benefits
16 general purpose input ports
18 V tolerant input ports with 100 k external series resistor
Input LOW threshold 0.55 V
DD
with minimum of 2.5 V at V
DD
=4.5V
Open-drain interrupt output
Interrupt enable pin (INT_EN) disables GPI pins and interrupt output
Interrupt-masking feature allows no interrupt generation from selected inputs
V
DD
range: 4.5 V to 5.5 V
I
DD
is very low 2.5 A maximum
SPI serial interface with speeds up to 5 MHz
SPI supports daisy-chain connection for large switch numbers
AEC-Q100 compliance available
PCA9703
18 V tolerant SPI 16-bit GPI with maskable INT
Rev. 4 — 5 September 2014 Product data sheet
PCA9703 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2014. All rights reserved.
Product data sheet Rev. 4 — 5 September 2014 2 of 28
NXP Semiconductors
PCA9703
18 V tolerant SPI 16-bit GPI with maskable INT
ESD protection exceeds 5 kV HBM per JESD22-A114 and 1000 V CDM per
JESD22-C101
Latch-up testing is done to JEDEC Standard JESD78 which exceeds 100 mA
Operating temperature range: 40 C to +125 C
Offered in TSSOP24 and HWQFN24 packages
3. Applications
Automotive
Body control modules
Electronic control units (for example, for body controller)
Switch monitoring
SBC wake pin extension
Industrial equipment
Cellular telephones
Emergency lighting
4. Ordering information
[1] PCA9703PW/Q900 is AEC-Q100 compliant. Contact i2c.support@nxp.com for PPAP.
Table 1. Ordering information
Type number Topside
marking
Package
Name Description Version
PCA9703HF 9703 HWQFN24 plastic thermal enhanced very very thin quad flat package;
no leads; 24 terminals; body 4 4 0.75 mm
SOT994-1
PCA9703PW PCA9703PW TSSOP24 plastic thin shrink small outline package; 24 leads;
body width 4.4 mm
SOT355-1
PCA9703PW/Q900
[1]
PCA9703PW TSSOP24 plastic thin shrink small outline package; 24 leads;
body width 4.4 mm
SOT355-1
PCA9703 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2014. All rights reserved.
Product data sheet Rev. 4 — 5 September 2014 3 of 28
NXP Semiconductors
PCA9703
18 V tolerant SPI 16-bit GPI with maskable INT
5. Block diagram
6. Pinning information
6.1 Pinning
Fig 1. Block diagram of PCA9703
CS
SCLK
SDIN
SDOUT
INT
002aae021
SHIFT REGISTER
DFF0
IN0
DFF1
IN1
DFF15
IN15
PCA9703
V
SS
V
DD
INT_EN
INPUT
STATUS
REGISTER
20 μA
INPUT
INPUT
INPUT
MASK REGISTER
Fig 2. Pin configuration for HWQFN24 Fig 3. Pin configuration for TSSOP24
002aae024
PCA9703HF
Transparent top view
IN11
IN4
IN5
IN12
IN3 IN13
IN2 IN14
IN1 IN15
IN0 CS
IN6
IN7
V
SS
IN8
IN9
IN10
INT_EN
INT
SDOUT
V
DD
SDIN
SCLK
terminal 1
index area
6
13
5
14
4 15
3 16
2 17
1
18
7
8
9
10
11
12
24
23
22
21
20
19
PCA9703PW
PCA9703PW/Q900
SDOUT V
DD
INT SDIN
INT_EN SCLK
IN0 CS
IN1 IN15
IN2 IN14
IN3 IN13
IN4 IN12
IN5 IN11
IN6 IN10
IN7 IN9
V
SS
IN8
002aae023
1
2
3
4
5
6
7
8
9
10
11
12
14
13
16
15
18
17
20
19
22
21
24
23

PCA9703PW/Q900,118

Mfr. #:
Manufacturer:
NXP Semiconductors
Description:
Interface - Specialized 16B 3V THRES SPI 18V GPI INT - 40 +125
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
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