NXP Semiconductors
MC33771B_SDS
Battery cell controller IC
MC33771BSDS All information provided in this document is subject to legal disclaimers. © NXP B.V. 2018. All rights reserved.
Short data sheet: technical data Rev. 5.0 — 2 May 2018
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7.3 Thermal characteristics
Table 8. Thermal ratings
All voltages are with respect to ground unless otherwise noted. Exceeding these ratings may cause a malfunction or
permanent damage to the device.
Symbol Description (rating) Min Max Unit
Thermal ratings
T
A
T
J
Operating temperature
Ambient
Junction
−40
−40
+105
+150
°C
T
STG
Storage temperature −55 +150 °C
T
PPRT
Peak package reflow temperature
[1]
[2]
— 260 °C
Thermal resistance and package dissipation ratings
R
ΘJB
Junction-to-board (bottom exposed pad soldered to board) 64
LQFP EP
[3]
— 10 °C/W
R
ΘJA
Junction-to-ambient, natural convection, single-layer board (1s) 64
LQFP EP
[4]
[5]
— 59 °C/W
R
ΘJA
Junction-to-ambient, natural convection, four-layer board (2s2p) 64
LQFP EP
[4]
[5]
— 27 °C/W
R
ΘJCTOP
Junction-to-case top (exposed pad) 64 LQFP EP
[6]
— 14 °C/W
R
ΘJCBOTTOM
Junction-to-case bottom (exposed pad) 64 LQFP EP
[7]
— 0.97 °C/W
ΨJT Junction to package top, natural convection
[8]
— 3 °C/W
[1] Pin soldering temperature limit is for 10 seconds maximum duration. Not designed for immersion soldering. Exceeding these limits may cause a
malfunction or permanent damage to the device.
[2] NXP’s Package Reflow capability meets Pb-free requirements for JEDEC standard J-STD-020C. For Peak Package Reflow Temperature and Moisture
Sensitivity Levels (MSL), go to www.nxp.com, search by part number (remove prefixes/suffixes) and enter the core ID to view all orderable parts
(MC33xxxD enter 33xxx), and review parametrics.
[3] Thermal resistance between the die and the printed circuit board per JEDEC JESD51-8. Board temperature is measured on the top surface of the board
near the package.
[4] Junction temperature is a function of die size, on-chip power dissipation, package thermal resistance, mounting site (board) temperature, ambient
temperature, air flow, power dissipation of other components on the board, and board thermal resistance.
[5] Per JEDEC JESD51-6 with the board (JESD51-7) horizontal.
[6] Thermal resistance between the die and the case top surface as measured by the cold plate method (MIL SPEC-883 Method 1012.1), with the cold plate
temperature used for the case temperature.
[7] Thermal resistance between the die and the solder pad on the bottom of the package based on simulation without any interface resistance.
[8] Thermal characterization parameter indicating the temperature difference between the package top and the junction temperature per JEDEC JESD51-2.
When Greek letter (Ψ) is not available, the thermal characterization parameter is written as Psi-JT.
7.4 Electrical characteristics
Table 9. Static and dynamic electrical characteristics
Characteristics noted under conditions 9.6 V ≤ V
PWR
≤ 61.6 V, −40 °C ≤ T
A
≤ 105 °C, GND = 0 V, unless otherwise stated.
Typical values refer to V
PWR
= 56 V, T
A
= 25 °C, unless otherwise noted.
Symbol Parameter Min Typ Max Unit
Power management
V
PWR(FO)
Supply voltage
Full parameter specification
9.6
—
61.6
V
