NXP Semiconductors
MC33771B_SDS
Battery cell controller IC
MC33771BSDS All information provided in this document is subject to legal disclaimers. © NXP B.V. 2018. All rights reserved.
Short data sheet: technical data Rev. 5.0 — 2 May 2018
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Number Name Function Definition
34 CB_2 Output Cell balance driver. Terminate to cell 2 cell
balance load resistor.
35 CB_2:1_C Output Cell Balance 2:1 common. Terminate to cell 2
and 1 common pin.
36 CB_1 Output Cell balance driver. Terminate to cell 1 cell
balance load resistor.
37 CT_1 Input Cell pin 1 input. Terminate to LPF resistor.
38 CT_REF Input Cell pin REF input. Terminate to LPF resistor.
39 SPI_COM_EN Input SPI communication enable, pin must be high
for the SPI to be active
40 FAULT Output Fault output dependent on user defined
internal or external faults. If not used, it must
be left open.
41 CSB Input SPI chip select
42 SO Output SPI serial output
43 VCOM Output Communication regulator output. Decouple
with 2.2 µF ceramic.
44 CGND Ground Communication decoupling ground.
Terminate to GNDREF
45 RDTX_OUT- I/O Receive/transmit output negative
46 SCLK/RDTX_IN- I/O SPI clock or receive/transmit input negative
47 SI/RDTX_IN+ I/O SPI serial input or receiver/transmit input
positive
48 RDTX_OUT+ I/O Receive/transmit output positive
49 GPIO0 I/O General purpose analog input or GPIO or
wake-up or fault daisy chain
50 GPIO1 I/O General purpose analog input or GPIO
51 GPIO2 I/O General purpose analog input or GPIO or
conversion trigger
52 GPIO3 I/O General purpose analog input or GPIO
53 GPIO4 I/O General purpose analog input or GPIO
54 GPIO5 I/O General purpose analog input or GPIO
55 GPIO6 I/O General purpose analog input or GPIO
56 ISENSE+ Input Current measurement input+
57 ISENSE- Input Current measurement input−
58 AGND Ground Analog ground, terminate to GNDREF
59 DGND Ground Digital ground, terminate to GNDREF
60 VANA Output Precision ADC analog supply. Decouple with
ceramic 47 nF ceramic capacitor to AGND.
61 SCL I/O I
2
C clock
62 SDA I/O I
2
C data
