Philips Semiconductors Product data
P87C554
80C51 8-bit microcontroller – 12 clock operation
16K/512 OTP/RAM, 8 channel 10-bit A/D, I
2
C, PWM,
capture/compare, high I/O
2002 Mar 25
44
Table 7. Master Receiver Mode
STATUS
STATUS OF THE I
2
C
APPLICATION SOFTWARE RESPONSE
STATUS
CODE
(S1STA)
STATUS
OF
THE
I
2
C
BUS AND
SIO1 HARDWARE
TO S1CON
NEXT ACTION TAKEN BY SIO1 HARDWARE
(S1STA) SIO1 HARDWARE
STA STO SI AA
08H A START condition has
been transmitted
Load SLA+R X 0 0 X SLA+R will be transmitted;
ACK bit will be received
10H A repeated START
diti h b
Load SLA+R or X 0 0 X As above
condition has been
transmitted
Load SLA+W X 0 0 X SLA+W will be transmitted;
SIO1 will be switched to MST/TRX mode
38H Arbitration lost in
NOT ACK bit
No S1DAT action or 0 0 0 X I
2
C bus will be released;
SIO1 will enter a slave mode
No S1DAT action 1 0 0 X A START condition will be transmitted when the
bus becomes free
40H SLA+R has been
transmitted; ACK has
bid
No S1DAT action or 0 0 0 0 Data byte will be received;
NOT ACK bit will be returned
been received
no S1DAT action 0 0 0 1 Data byte will be received;
ACK bit will be returned
48H SLA+R has been
t itt d NOT ACK
No S1DAT action or 1 0 0 X Repeated START condition will be transmitted
transmitted; NOT ACK
has been received
no S1DAT action or 0 1 0 X STOP condition will be transmitted;
STO flag will be reset
no S1DAT action 1 1 0 X STOP condition followed by a
START condition will be transmitted;
STO flag will be reset
50H Data byte has been
received; ACK has been
d
Read data byte or 0 0 0 0 Data byte will be received;
NOT ACK bit will be returned
returned
read data byte 0 0 0 1 Data byte will be received;
ACK bit will be returned
58H Data byte has been
i d NOT ACK h
Read data byte or 1 0 0 X Repeated START condition will be transmitted
received; NOT ACK has
been returned
read data byte or 0 1 0 X STOP condition will be transmitted;
STO flag will be reset
read data byte 1 1 0 X STOP condition followed by a
START condition will be transmitted;
STO flag will be reset
Philips Semiconductors Product data
P87C554
80C51 8-bit microcontroller – 12 clock operation
16K/512 OTP/RAM, 8 channel 10-bit A/D, I
2
C, PWM,
capture/compare, high I/O
2002 Mar 25
45
Table 8. Slave Receiver Mode
STATUS
STATUS OF THE
APPLICATION SOFTWARE RESPONSE
STATUS
CODE
(S1STA)
STATUS
OF
THE
I
2
C BUS AND
SIO1 HARDWARE
TO/FROM S1DAT
TO S1CON
NEXT ACTION TAKEN BY SIO1 HARDWARE
(S1STA) SIO1 HARDWARE
TO/FROM
S1DAT
STA STO SI AA
60H Own SLA+W has
been received; ACK
hb d
No S1DAT action or X 0 0 0 Data byte will be received and NOT ACK will be
returned
has been returned
no S1DAT action X 0 0 1 Data byte will be received and ACK will be returned
68H Arbitration lost in
SLA+R/W as master;
Own SLA+W has
b i d ACK
No S1DAT action or X 0 0 0 Data byte will be received and NOT ACK will be
returned
been received, ACK
returned
no S1DAT action X 0 0 1 Data byte will be received and ACK will be returned
70H General call address
(00H) has been
received
;
ACK has
No S1DAT action or X 0 0 0 Data byte will be received and NOT ACK will be
returned
received
ACK
has
been returned
no S1DAT action X 0 0 1 Data byte will be received and ACK will be returned
78H Arbitration lost in
SLA+R/W as master;
General call address
has been received
No S1DAT action or X 0 0 0 Data byte will be received and NOT ACK will be
returned
has
been
received
,
ACK has been
returned
no S1DAT action X 0 0 1 Data byte will be received and ACK will be returned
80H Previously addressed
with own SLV
address; DATA has
b i d ACK
Read data byte or X 0 0 0 Data byte will be received and NOT ACK will be
returned
been received; ACK
has been returned
read data byte X 0 0 1 Data byte will be received and ACK will be returned
88H Previously addressed
with own SLA; DATA
bhb
Read data byte or 0 0 0 0 Switched to not addressed SLV mode; no recognition
of own SLA or General call address
byte has been
received; NOT ACK
has been returned
read data byte or 0 0 0 1 Switched to not addressed SLV mode; Own SLA will
be recognized; General call address will be
recognized if S1ADR.0 = logic 1
read data byte or 1 0 0 0 Switched to not addressed SLV mode; no recognition
of own SLA or General call address. A START
condition will be transmitted when the bus becomes
free
read data byte 1 0 0 1 Switched to not addressed SLV mode; Own SLA will
be recognized; General call address will be
recognized if S1ADR.0 = logic 1. A START condition
will be transmitted when the bus becomes free.
90H Previously addressed
with General Call;
DATA byte has been
i d ACK h
Read data byte or X 0 0 0 Data byte will be received and NOT ACK will be
returned
received; ACK has
been returned
read data byte X 0 0 1 Data byte will be received and ACK will be returned
98H Previously addressed
with General Call;
DATA b h b
Read data byte or 0 0 0 0 Switched to not addressed SLV mode; no recognition
of own SLA or General call address
DATA byte has been
received; NOT ACK
has been returned
read data byte or 0 0 0 1 Switched to not addressed SLV mode; Own SLA will
be recognized; General call address will be
recognized if S1ADR.0 = logic 1
read data byte or 1 0 0 0 Switched to not addressed SLV mode; no recognition
of own SLA or General call address. A START
condition will be transmitted when the bus becomes
free
read data byte 1 0 0 1 Switched to not addressed SLV mode; Own SLA will
be recognized; General call address will be
recognized if S1ADR.0 = logic 1. A START condition
will be transmitted when the bus becomes free.
Philips Semiconductors Product data
P87C554
80C51 8-bit microcontroller – 12 clock operation
16K/512 OTP/RAM, 8 channel 10-bit A/D, I
2
C, PWM,
capture/compare, high I/O
2002 Mar 25
46
Table 8. Slave Receiver Mode (Continued)
STATUS
STATUS OF THE
APPLICATION SOFTWARE RESPONSE
STATUS
CODE
(S1STA)
STATUS
OF
THE
I
2
C BUS AND
SIO1 HARDWARE
TO/FROM S1DAT
TO S1CON
NEXT ACTION TAKEN BY SIO1 HARDWARE
(S1STA) SIO1 HARDWARE
TO/FROM
S1DAT
STA STO SI AA
A0H A STOP condition or
repeated START
di i h b
No STDAT action or 0 0 0 0 Switched to not addressed SLV mode; no recognition
of own SLA or General call address
condition has been
received while still
addressed as
SLV/REC or SLV/TRX
No STDAT action or 0 0 0 1 Switched to not addressed SLV mode; Own SLA will
be recognized; General call address will be
recognized if S1ADR.0 = logic 1
SLV/REC
or
SLV/TRX
No STDAT action or 1 0 0 0 Switched to not addressed SLV mode; no recognition
of own SLA or General call address. A START
condition will be transmitted when the bus becomes
free
No STDAT action 1 0 0 1 Switched to not addressed SLV mode; Own SLA will
be recognized; General call address will be
recognized if S1ADR.0 = logic 1. A START condition
will be transmitted when the bus becomes free.
Table 9. Slave Transmitter Mode
STATUS
STATUS OF THE
APPLICATION SOFTWARE RESPONSE
STATUS
CODE
(S1STA)
STATUS
OF
THE
I
2
C BUS AND
SIO1 HARDWARE
TO/FROM S1DAT
TO S1CON
NEXT ACTION TAKEN BY SIO1 HARDWARE
(S1STA) SIO1 HARDWARE
TO/FROM
S1DAT
STA STO SI AA
A8H Own SLA+R has
been received; ACK
hb d
Load data byte or X 0 0 0 Last data byte will be transmitted and ACK bit will be
received
has been returned
load data byte X 0 0 1 Data byte will be transmitted; ACK will be received
B0H Arbitration lost in
SLA+R/W as master;
Own SLA+R has
Load data byte or X 0 0 0 Last data byte will be transmitted and ACK bit will be
received
been received, ACK
has been returned
load data byte X 0 0 1 Data byte will be transmitted; ACK bit will be received
B8H Data byte in S1DAT
has been transmitted;
ACK has been
Load data byte or X 0 0 0 Last data byte will be transmitted and ACK bit will be
received
ACK
has
been
received
load data byte X 0 0 1 Data byte will be transmitted; ACK bit will be received
C0H Data byte in S1DAT
has been transmitted;
NOT ACK h b
No S1DAT action or 0 0 0 01 Switched to not addressed SLV mode; no recognition
of own SLA or General call address
NOT ACK has been
received
no S1DAT action or 0 0 0 1 Switched to not addressed SLV mode; Own SLA will
be recognized; General call address will be
recognized if S1ADR.0 = logic 1
no S1DAT action or 1 0 0 0 Switched to not addressed SLV mode; no recognition
of own SLA or General call address. A START
condition will be transmitted when the bus becomes
free
no S1DAT action 1 0 0 1 Switched to not addressed SLV mode; Own SLA will
be recognized; General call address will be
recognized if S1ADR.0 = logic 1. A START condition
will be transmitted when the bus becomes free.
C8H Last data byte in
S1DAT has been
i d (AA 0)
No S1DAT action or 0 0 0 0 Switched to not addressed SLV mode; no recognition
of own SLA or General call address
transmitted (AA = 0);
ACK has been
received
no S1DAT action or 0 0 0 1 Switched to not addressed SLV mode; Own SLA will
be recognized; General call address will be
recognized if S1ADR.0 = logic 1
no S1DAT action or 1 0 0 0 Switched to not addressed SLV mode; no recognition
of own SLA or General call address. A START
condition will be transmitted when the bus becomes
free
no S1DAT action 1 0 0 1 Switched to not addressed SLV mode; Own SLA will
be recognized; General call address will be
recognized if S1ADR.0 = logic 1. A START condition
will be transmitted when the bus becomes free.

P87C554SFAA,512

Mfr. #:
Manufacturer:
NXP Semiconductors
Description:
Microcontrollers - MCU 8-bit Microcontrollers - MCU 80C51 16K/512 OTP
Lifecycle:
New from this manufacturer.
Delivery:
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