2. All input pulses are supplied by generators having the following characteristics: PRR ≤10MHz, ZO = 50Ω, input slew rate = 1 V/ns ±20% (unless otherwise specified).
Load Circuit: High-to-Low Slew-Rate
Voltage Waveforms: High-to-Low Slew-Rate
Load Circuit: Low-to-High Slew-Rate
Voltage Waveforms: Low-to-High Slew-Rate
14
COMMERCIAL TEMPERATURE RANGE
IDT74SSTU32865
28-BIT 1:2 REGISTERED BUFFER WITH PARITY
CL = 10 pF
RL = 1KΩ
DUT
Out
Test Point
V
DD
VOH
VDD
Output
Waveform 2
LVCMOS
RESET
Input
tPLH
VDD/2
0.15V
0V
0V
VOH
Output
Waveform 2
0.15V
0V
VDD
VICR
tHL
Timing
Inputs
VICR
VI(PP)
Output
Waveform 1
V
DD/2
VOL
VICR
tHL
Timing
Inputs
VICR
VI(PP)
TEST CIRCUITS AND WAVEFORMS (VDD = 1.8V ± 0.1V)
NOTES:
1. CL includes probe and jig capacitance.
2. All input pulses are supplied by generators having the following characteristics: PRR ≤10MHz, ZO = 50Ω, input slew rate = 1 V/ns ±20% (unless otherwise specified).
Load Circuit: High-to-Low Slew-Rate
Voltage Waveforms: Open Drain Output Low-to-High Transition Time (with Respect to
RESET RESET
RESET RESET
RESET
Input)
Voltage Waveforms: Open Drain Output High-to-Low Transition Time (with Respect to Clock Inputs)
Voltage Waveforms: Open Drain Output Low-to-High Transition Time (with Respect to Clock Inputs)
15
COMMERCIAL TEMPERATURE RANGE
IDT74SSTU32865
28-BIT 1:2 REGISTERED BUFFER WITH PARITY
ORDERING INFORMATION
IDT
XXXXXXX
PackageDevice TypeTemp. Range
BKG
Thin Profile, Fine Pitch, Ball Grid Array - Green
74
28-Bit 1:2 Registered Buffer with Parity
0°C to +70°C
SSTU32
865
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