IDT74SSTUBF32865A
28-BIT 1:2 REGISTERED BUFFER WITH PARITY COMMERCIAL TEMPERATURE GRADE
28-BIT 1:2 REGISTERED BUFFER WITH PARITY 7
IDT74SSTUBF32865A 7092/11
Absolute Maximum Ratings
Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the
device. This is a stress rating only and functional operation of the device at these or any other conditions above
those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect reliability.
Item Rating
Supply Voltage, VDD -0.5V to 2.5V
Input Voltage Range, V
I
1
1 The input and output negative voltage ratings may be exceeded if the ratings of the I/P and
O/P clamp current are observed.
-0.5V to V
DD + 2.5V
Output Voltage Range, V
O
1,2
2 This current will flow only when the output is in the high state level VO > VDDQ.
-0.5V to V
DDQ + 0.5V
Input Clamp Current, I
IK ±50mA
Output Clamp Current, I
OK ±50mA
Continuous Output Clamp Current, I
O ±50mA
Continuous Current through each V
DD or GND ±100mA
Package Thermal Impedance (
θja)
3
3 The package thermal impedance is calculated in accordance with JESD 51.
0m/s Airflow 44.3° C/W
1m/s Airflow 38.1° C/W
Storage Temperature, T
STG -65 to +150°C
IDT74SSTUBF32865A
28-BIT 1:2 REGISTERED BUFFER WITH PARITY COMMERCIAL TEMPERATURE GRADE
28-BIT 1:2 REGISTERED BUFFER WITH PARITY 8
IDT74SSTUBF32865A 7092/11
Operating Characteristics
The RESET and CSGateEN inputs of the device must be held at valid levels (not floating) to ensure proper device
operation. The differential inputs must not be floating unless RESET
is LOW.
Symbol
Parameter Min. Typ. Max. Units
VDD I/O Supply Voltage 1.7 1.8 1.9 V
V
REF Reference Voltage 0.49 * VDD 0.5 * VDD 0.51 * VDD V
V
TT Termination Voltage VREF - 0.04 VREF VREF + 0.04 V
V
I Input Voltage 0 VDD V
V
IH AC High-Level Input Voltage
Dn, PARIN,
DCSn
,
DCKEn,
DODTn
V
REF + 0.25
V
V
IL AC Low-Level Input Voltage VREF - 0.25
V
IH DC High-Level Input Voltage VREF + 0.125
V
IL DC Low-Level Input Voltage VREF - 0.125
V
IH High-Level Input Voltage
RESET
,
CSGateEN
0.65 * V
DDQ
V
V
IL Low-Level Input Voltage 0.35 * VDDQ
VICR Common Mode Input Range
CLK, CLK
0.675 1.125 V
V
ID Differential Input Voltage 600 mV
I
OH High-Level Output Current -8
mA
I
OL Low-Level Output Current 8
I
ERROL PTYERR LOW Level Output Current 25 mA
T
A Operating Free-Air Temperature 0 +70 ° C
IDT74SSTUBF32865A
28-BIT 1:2 REGISTERED BUFFER WITH PARITY COMMERCIAL TEMPERATURE GRADE
28-BIT 1:2 REGISTERED BUFFER WITH PARITY 9
IDT74SSTUBF32865A 7092/11
DC Electrical Characteristics Over Operating Range
Following Conditions Apply Unless Otherwise Specified:
Operating Condition: T
A = 0°C to +70°C, VDD = 1.8V ± 0.1V.
Symbol
Parameter Test Conditions Min. Typ. Max. Units
VOH Output HIGH Voltage IOH = -6mA, VDDQ = 1.7V 1.2 V
V
OL Output LOW Voltage IOL = 6mA, VDDQ = 1.7V 0.5 V
V
ERROL
PTYERR Output
LOW Voltage
IERROL = 25mA, VDD = 1.7V 0.5 V
I
IL All Inputs VI = VDD or GND; VDD = 1.9V -5 +5 µA
I
DD
Static Standby IO = 0, VDD = 1.9V, RESET = GND 200 µA
Static Operating
I
O = 0, VDD = 1.9V, RESET = VDD, VI =
V
IH(AC) or VIL(AC), CLK = CLK = VIH(AC)
or V
IL(AC)
10
mA
I
O = 0, VDD = 1.9V, RESET = VDD, VI =
V
IH(AC) or VIL(AC), CLK = VIH(AC), CLK =
V
IL(AC)
120
I
DDD
Dynamic Operating
(clock only)
I
O = 0, VDD = 1.8V, RESET = VDD, VI =
V
IH(AC) or VIL(AC), CLK and CLK
switching 50% duty cycle
300
µA/Clock
MHz
Dynamic Operating
(per each data input)
I
O = 0, VDD = 1.8V, RESET = VDD, VI =
V
IH(AC) or VIL(AC), CLK and CLK
switching 50% duty cycle. One data input
switching at half clock frequency, 50%
duty cycle.
40
µA/Clock
MHz/
Data
C
IN
Dn, PARIN VI = VREF ± 350mV 2 3
pFCLK and CLK
VICR = 1.25V, VIPP = 360mV 2.5 3.5
RESET
VI = VDD or GND 5

74SSTUBF32865ABKG8

Mfr. #:
Manufacturer:
IDT
Description:
Registers DDR2 - 800 REGISTER
Lifecycle:
New from this manufacturer.
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