9-OUTPUT 1.8V HCSL FANOUT BUFFER 4 MARCH 14, 2017
9DBV0931 DATASHEET
Pin Descriptions (cont.)
PIN # PIN NAME TYPE DESCRIPTION
35 DIF5 OUT Differential true clock output.
36 DIF5# OUT Differential complementary clock output.
37 vOE5# IN
Active low input for enabling output 5. This pin has an internal 120kohm pull-
down.
1 = disable outputs, 0 = enable outputs.
38 VDD1.8 PWR Power supply, nominally 1.8V.
39 VDDIO PWR Power supply for differential outputs.
40 GND GND Ground pin.
41 DIF6 OUT Differential true clock output.
42 DIF6# OUT Differential complementary clock output.
43 vOE6# IN
Active low input for enabling output 6. This pin has an internal 120kohm pull-
down.
1 = disable outputs, 0 = enable outputs.
44 DIF7 OUT Differential true clock output.
45 DIF7# OUT Differential complementary clock output.
46 vOE7# IN
Active low input for enabling output 7. This pin has an internal 120kohm pull-
down.
1 = disable outputs, 0 = enable outputs.
47 VDDIO PWR Power supply for differential outputs.
48 ^CKPWRGD_PD# IN
Input notifies device to sample latched inputs and start up on first high
assertion. Low enters Power Down Mode, subsequent high assertions exit
Power Down Mode. This pin has internal 120kohm pull-up resistor.
49 EPAD GND
Connect epad to ground.
MARCH 14, 2017 5 9-OUTPUT 1.8V HCSL FANOUT BUFFER
9DBV0931 DATASHEET
Test Loads
Alternate Terminations
The 9DBV0931 can easily drive LVPECL, LVDS, and CML logic. See “AN-891 Driving LVPECL, LVDS, and CML Logic with IDT's
“Universal” Low-Power HCSL Outputs” for details.
Alternate Differential Output Terminations
Rs Zo Units
33 100
27 85
Ohms
9-OUTPUT 1.8V HCSL FANOUT BUFFER 6 MARCH 14, 2017
9DBV0931 DATASHEET
Absolute Maximum Ratings
Stresses above the ratings listed below can cause permanent damage to the 9DBV0931. These ratings, which are standard
values for IDT commercially rated parts, are stress ratings only. Functional operation of the device at these or any other
conditions above those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum
rating conditions for extended periods can affect product reliability. Electrical parameters are guaranteed only over the
recommended operating temperature range.
Electrical Characteristics–Clock Input Parameters
PARAMETER SYMBOL CONDITIONS
MIN TYP MAX
UNITS NOTES
Supply Voltage V
DD
x Applies to V
DD
, V
DDA
and V
DDIO
-0.5 2.5 V 1,2
Input Voltage V
IN
-0.5 V
DD
+0.5 V 1,3
Input High Voltage, SMBus V
IHSMB
SMBus clock and data pins 3.3 V 1
Storage Temperature Ts -65 150 °C 1
Junction Temperature Tj 125 °C 1
Input ESD Protection
ESD prot Human Body Model 2000 V 1
1
Guaranteed by design and characterization, not 100% tested in production.
2
Operation under these conditions is neither implied nor guaranteed.
3
Not to exceed 2.5V.
TA = T
COM
or T
IND
; Supply voltages per normal operation conditions; see Test Loads for loading conditions
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS NOTES
Input Crossover Voltage -
DIF_IN
V
CROSS
Cross over voltage 150 900 mV 1
Input Swing - DIF_IN V
SWING
Differential value 300 mV 1
Input Slew Rate - DIF_IN dv/dt Measured differentially 0.4 8 V/ns 1,2
Input Leakage Current I
IN
V
IN
= V
DD ,
V
IN
=
GND -5 5 µA
Input Duty Cycle d
tin
Measurement from differential waveform 40 60 % 1
Input Jitter - Cycle to Cycle J
DIFIn
Differential measurement 0 125 ps 1
1
Guaranteed by design and characterization, not 100% tested in production.
2
Slew rate measured through +/-75mV window centered around differential zero.

9DBV0931AKLF

Mfr. #:
Manufacturer:
IDT
Description:
Clock Buffer 9-output 1.8 V PCIe Gen1-2-3 Fanout Buff
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
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