LTC2752
10
2752f
pin FuncTions
S2 (Pin 25): Span Bit 2 Input. In Manual Span mode (M-
SPAN tied to V
DD
), pins S0, S1 and S2 are pin-strapped
to select a single fixed output range for all DACs. These
pins should be tied to either GND or V
DD
even if they are
unused.
LDAC (Pin 26): Asynchronous DAC Load Input. When
LDAC is a logic low, all DACs are updated (CS/LD must
be high).
I
OUT2BF
, I
OUT2BS
(Pins 28, 29): DAC B Current Output
Complement Force and Sense Pins. Tie to ground via a
clean, low impedance path. These pins may be used with
a precision ground buffer amp as a Kelvin sensing pair
(see the Typical Applications section).
R
INB
(Pins 31, 32): Input Resistor for the External Reference
Inverting Amplifier. The 20k input resistor is connected
internally from R
INB
to R
COMB
. For normal operation tie
R
INB
to the external positive reference voltage (see Typical
Applications). Either or both of these precision matched
resistor sets (each set comprising R
INX
, R
COMX
and R
EFX
)
may be used to invert positive references to provide the
negative voltages needed by the DACs. Typically 5V; ac-
cepts up to ±15V. Pins 31 and 32 are internally shorted
together.
GE
ADJB
(Pin 33): Gain Adjust Pin for DAC B. This control
pin can be used to null gain error or to compensate for
reference errors. The gain change expressed in LSB is
the same for any output range. See System Offset and
Gain Adjustments in the Operation section. Tie to ground
if not used.
R
COMB
(Pin 34): Virtual Ground Point for the DAC B Ref-
erence Amplifier Inverting Resistors. The 20k reference
inverting resistors are connected internally from R
INB
to
R
COMB
and from R
COMB
to REFB, respectively (see Block
Diagram). For normal operation tie R
COMB
to the negative
input of the external reference inverting amplifier (see
Typical Applications).
REFB (Pins 35, 36): Feedback Resistor for the DAC B
Reference Inverting Amplifier, and Reference Input for
DAC B. The 20k feedback resistor is connected internally
from REFB to R
COMB
. For normal operation tie this pin to
the output of the DAC B reference inverting amplifier (see
Typical Applications). Typically –5V; accepts up to ±15V.
Pins 35 and 36 are internally shorted together.
R
OFSB
(Pins 37, 38): Bipolar Offset Resistor for DAC B.
These pins provide the translation of the output voltage
range for bipolar spans. Accepts up to ±15V; for normal
operation tie to the positive reference voltage at R
INB
(Pins
31, 32). Pins 37 and 38 are internally shorted together.
R
FBB
(Pins 39, 40): DAC B Feedback Resistor. For normal
operation tie to the output of the I/V converter amplifier for
DAC B (see Typical Applications). The DAC output current
from I
OUT1B
flows through the feedback resistor to the R
FBB
pins. Pins 39 and 40 are internally shorted together.
I
OUT1B
(Pin 41): DAC B Current Output. This pin is a virtual
ground when the DAC is operating and should reside at
0V. For normal operation tie to the negative input of the I/V
converter amplifier for DAC B (see Typical Applications).
V
OSADJB
(Pin 42): DAC B Offset Adjust Pin. This voltage
control pin can be used to null unipolar offset or bipolar zero
error. The offset change expressed in LSB is the same for
any output range. See System Offset and Gain Adjustments
in the Operation section. Tie to ground if not used.
V
OSADJA
(Pin 43): DAC A Offset Adjust Pin. This voltage
control pin can be used to null unipolar offset or bipolar zero
error. The offset change expressed in LSB is the same for
any output range. See System Offset and Gain Adjustments
in the Operation section. Tie to ground if not used.
I
OUT1A
(Pin 44): DAC A Current Output. This pin is a virtual
ground when the DAC is operating and should reside at
0V. For normal operation tie to the negative input of the I/V
converter amplifier for DAC A (see Typical Applications).
R
FBA
(Pins 45, 46): DAC A Feedback Resistor. For normal
operation tie to the output of the I/V converter amplifier for
DAC A (see Typical Applications). The DAC output current
from I
OUT1A
flows through the feedback resistor to the R
FBA
pins. Pins 45 and 46 are internally shorted together.
R
OFSA
(Pins 47, 48): Bipolar Offset Resistor for DAC A.
This pin provides the translation of the output voltage
range for bipolar spans. Accepts up to ±15V; for normal
operation tie to the positive reference voltage at R
INA
(Pins
5, 6). Pins 47 and 48 are internally shorted together.
LTC2752
11
2752f
block DiagraM
16
3
CODE REGISTERS
SPAN REGISTERS
33
34
41
29
42
(37, 38) R
OFSB
(35, 36) REFB
(31, 32) R
INB
SROSCKSDIS2S1S0M-SPAN CS/LD LDACCLRRFLAG
GE
ADJB
R
COMB
I
OUT1B
I
OUT2BS
V
OSADJB
(39, 40) R
FBB
28
I
OUT2BF
9
I
OUT2AF
26131211192025242322
16
3
CODE REGISTERS
SPAN REGISTERS
DAC REG
DAC REG
4
3
44
8
43
R
OFSA
(47, 48)
REFA (1, 2)
R
INA
(5, 6)
GE
ADJA
R
COMA
I
OUT1A
I
OUT2AS
V
OSADJA
R
FBA
(45, 46)
DAC A
16-BIT WITH
SPAN SELECT
GND (7, 10, 15, 17, 18, 27, 30)
14
V
DD
16
INPUT REG
INPUT REG
INPUT REG
INPUT REG
DAC REG
DAC REG
DAC B
16-BIT WITH
SPAN SELECT
CONTROL AND READBACK LOGIC
POWER-ON
RESET
2752 BD
2.56M 2.56M
20k
20k
20k
20k
LTC2752
12
2752f
TiMing DiagraM
SDI
SRO
Hi-Z
CS/LD
SCK
LSB
2752 TD
LSB
t
2
t
9
t
8
t
5
t
7
1 2 31 32
t
6
t
1
LDAC
t
3
t
4
t
11

LTC2752ACLX#PBF

Mfr. #:
Manufacturer:
Analog Devices Inc.
Description:
Digital to Analog Converters - DAC Dual16-Bit Serial SoftSpan IOUT DACs ( 1LSB INL Max)
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
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