©2011 Silicon Storage Technology, Inc. DS25023A 08/11
13
1 Mbit / 2 Mbit / 4 Mbit Multi-Purpose Flash
SST39LF010 / SST39LF020 / SST39LF040
SST39VF010 / SST39VF020 / SST39VF040
Data Sheet
A
Microchip Technology Company
Table 8: DC Operating Characteristics -V
DD
= 3.0-3.6V for SST39LF010/020/040 and 2.7-
3.6V for SST39VF010/020/040
1
Symbol Parameter
Limits
Test ConditionsMin Max Units
I
DD
Power Supply Current Address input=V
ILT
/V
IHT
, at f=1/T
RC
Min
V
DD
=V
DD
Max
Read
2
20 mA CE#=V
IL
, OE#=WE#=V
IH
, all I/Os open
Program and Erase
3
30 mA CE#=WE#=V
IL
, OE#=V
IH
I
SB
Standby V
DD
Current 15 µA CE#=V
IHC
,V
DD
=V
DD
Max
I
LI
Input Leakage Current 1 µA V
IN
=GND to V
DD
,V
DD
=V
DD
Max
I
LO
Output Leakage Current 10 µA V
OUT
=GND to V
DD
,V
DD
=V
DD
Max
V
IL
Input Low Voltage 0.8 V V
DD
=V
DD
Min
V
IH
Input High Voltage 0.7V
DD
VV
DD
=V
DD
Max
V
IHC
Input High Voltage (CMOS) V
DD
-0.3 V V
DD
=V
DD
Max
V
OL
Output Low Voltage 0.2 V I
OL
=100 µA, V
DD
=V
DD
Min
V
OH
Output High Voltage V
DD
-0.2 V I
OH
=-100 µA, V
DD
=V
DD
Min
T8.7 25023
1. Typical conditions for the Active Current shown on the front data sheet page are average values at 25°C
(room temperature), and V
DD
= 3V for VF devices. Not 100% tested.
2. Values are for 70 ns conditions. See the Multi-Purpose Flash Power Rating application note for further information.
3. 30 mA max for Erase operations in the industrial temperature range.
Table 9: Recommended System Power-up Timings
Symbol Parameter Minimum Units
T
PU-READ
1
1. This parameter is measured only for initial qualification and after a design or process change that could affect this
parameter.
Power-up to Read Operation 100 µs
T
PU-WRITE
1
Power-up to Program/Erase Operation 100 µs
T9.1 25023
Table 10:Capacitance (Ta = 25°C, f=1 Mhz, other pins open)
Parameter Description Test Condition Maximum
C
I/O
1
1. This parameter is measured only for initial qualification and after a design or process change that could affect this
parameter.
I/O Pin Capacitance V
I/O
=0V 12pF
C
IN
1
Input Capacitance V
IN
=0V 6pF
T10.0 25023
Table 11:Reliability Characteristics
Symbol Parameter Minimum Specification Units Test Method
N
END
1,2
1. This parameter is measured only for initial qualification and after a design or process change that could affect this
parameter.
2. N
END
endurance rating is qualified as a 10,000 cycle minimum for the whole device. A sector- or block-level rating
would result in a higher minimum specification.
Endurance 10,000 Cycles JEDEC Standard A117
T
DR
1
Data Retention 100 Years JEDEC Standard A103
I
LTH
1
Latch Up 100 + I
DD
mA JEDEC Standard 78
T11.3 25023
©2011 Silicon Storage Technology, Inc. DS25023A 08/11
14
1 Mbit / 2 Mbit / 4 Mbit Multi-Purpose Flash
SST39LF010 / SST39LF020 / SST39LF040
SST39VF010 / SST39VF020 / SST39VF040
Data Sheet
A
Microchip Technology Company
AC Characteristics
Table 12:Read Cycle Timing Parameters - V
DD
= 3.0-3.6V for SST39LF010/020/040 and
2.7-3.6V for SST39VF010/020/040
Symbol Parameter
SST39LF010-45
SST39LF020-45
SST39LF040-45
SST39LF020-55
SST39LF040-55
SST39VF010-70
SST39VF020-70
SST39VF040-70
UnitsMin Max Min Max Min Max
T
RC
Read Cycle Time 45 55 70 ns
T
CE
Chip Enable Access Time 45 55 70 ns
T
AA
Address Access Time 45 55 70 ns
T
OE
Output Enable Access Time 30 30 35 ns
T
CLZ
1
1. This parameter is measured only for initial qualification and after a design or process change that could affect this
parameter.
CE# Low to Active Output 0 0 0 ns
T
OLZ
1
OE# Low to Active Output 0 0 0 ns
T
CHZ
1
CE# High to High-Z Output 15 15 25 ns
T
OHZ
1
OE# High to High-Z Output 15 15 25 ns
T
OH
1
Output Hold from Address Change
000ns
T12.2 25023
Table 13:Program/Erase Cycle Timing Parameters
Symbol Parameter Min Max Units
T
BP
Byte-Program Time 20 µs
T
AS
Address Setup Time 0 ns
T
AH
Address Hold Time 30 ns
T
CS
WE# and CE# Setup Time 0 ns
T
CH
WE# and CE# Hold Time 0 ns
T
OES
OE# High Setup Time 0 ns
T
OEH
OE# High Hold Time 10 ns
T
CP
CE# Pulse Width 40 ns
T
WP
WE# Pulse Width 40 ns
T
WPH
1
1. This parameter is measured only for initial qualification and after a design or process change that could affect this
parameter.
WE# Pulse Width High 30 ns
T
CPH
1
CE# Pulse Width High 30 ns
T
DS
Data Setup Time 40 ns
T
DH
1
Data Hold Time 0 ns
T
IDA
1
Software ID Access and Exit Time 150 ns
T
SE
Sector-Erase 25 ms
T
SCE
Chip-Erase 100 ms
T13.1 25023
©2011 Silicon Storage Technology, Inc. DS25023A 08/11
15
1 Mbit / 2 Mbit / 4 Mbit Multi-Purpose Flash
SST39LF010 / SST39LF020 / SST39LF040
SST39VF010 / SST39VF020 / SST39VF040
Data Sheet
A
Microchip Technology Company
Figure 6: Read Cycle Timing Diagram
Figure 7: WE# Controlled Program Cycle Timing Diagram
1150 F03.0
ADDRESS A
MS-0
DQ
7-0
WE#
OE#
CE#
T
CE
T
RC
T
AA
T
OE
T
OLZ
V
IH
HIGH-Z
T
CLZ
T
OH
T
CHZ
HIGH-Z
DATA VAL I DDATA VAL I D
T
OHZ
Note: A
MS
= Most significant address
A
MS
=A
16
for SST39LF/VF010, A
17
for SST39LF/VF020 and A
18
for SST39LF/VF040
1150 F04.0
ADDRESS A
MS-0
DQ
7-0
T
DH
T
WPH
T
DS
T
WP
T
AH
T
AS
T
CH
T
CS
CE#
SW0 SW1 SW2
5555 2AAA 5555 ADDR
AA 55 A0 DATA
INTERNAL PROGRAM OPERATION STARTS
BYTE
(ADDR/DATA)
OE#
WE#
T
BP
Note: A
MS
= Most significant address
A
MS
=A
16
for SST39LF/VF010, A
17
for SST39LF/VF020 and A
18
for SST39LF/VF040

SST39LF010-45-4C-B3KE

Mfr. #:
Manufacturer:
Microchip Technology
Description:
NOR Flash 128K X 8 45ns
Lifecycle:
New from this manufacturer.
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