©2011 Silicon Storage Technology, Inc. DS25023A 08/11
6
1 Mbit / 2 Mbit / 4 Mbit Multi-Purpose Flash
SST39LF010 / SST39LF020 / SST39LF040
SST39VF010 / SST39VF020 / SST39VF040
Data Sheet
Microchip Technology Company
Figure 5: Pin Assignment for 34-ball WFBGA (4mm x 6mm) for 1 Mbit and 2 Mbit
Table 1: Pin Description
Symbol Pin Name Functions
A
MS
1
-A
0
1. A
MS
= Most significant address
A
MS
=A
16
for SST39LF/VF010, A
17
for SST39LF/VF020, and A
18
for SST39LF/VF040
Address Inputs To provide memory addresses. During Sector-Erase A
MS
-A
12
address lines will
select the sector. During Block-Erase A
MS
-A
16
address lines will select the block.
DQ
7
-DQ
0
Data Input/output To output data during Read cycles and receive input data during Write cycles.
Data is internally latched during a Write cycle.
The outputs are in tri-state when OE# or CE# is high.
CE# Chip Enable To activate the device when CE# is low.
OE# Output Enable To gate the data output buffers.
WE# Write Enable To control the Write operations.
V
DD
Power Supply To provide power supply voltage: 3.0-3.6V for SST39LF010/020/040
2.7-3.6V for SST39VF010/020/040
V
SS
Ground
NC No Connection Unconnected pins.
T1.1 25023
A2
A1
A0
CE#
V
SS
A17
V
DD
A16
A12
A8
A14
WE#
A18
A15
A6
A9
A13
A7
A5
A11
A4
NC1
NC2
OE#
A3
A10
DQ7
A0
A2
CE#
DQ5
DQ3
DQ2
DQ0
A1
DQ6
DQ4
V
SS
DQ1
TOP VIEW (balls facing down)
Note: For SST39LF020, ball B3 is No Connect
For SST39LF010, balls B3 and A5 are No Connect
AB C D E F G H J
6
5
4
3
2
1
1150 34-wfbga MM P5.0
