LTC4264
5
4264f
PIN FUNCTIONS
SHDN (Pin 1): Shutdown Input. Used to command the
LTC4264 to present an invalid signature. Connecting
SHDN to GND lowers the signature resistance to an invalid
value and disables other LTC4264 operations. If unused,
tie SHDN to V
IN
.
NC (Pin 2): No Internal Connection.
R
CLASS
(Pin 3): Class Select Input. Used to set the current
the LTC4264 maintains during classifi cation. Connect a
resistor between R
CLASS
and V
IN
. (See Table 2.)
I
LIM_EN
(Pin 4): Input Current Limit Enable. Used to control
LTC4264 current limit behavior during powered operation.
For normal operation, fl oat I
LIM_EN
to enable I
LIMIT_HIGH
current. Tie I
LIM_EN
to V
IN
to disable input current limit.
Note that the inrush current limit does not change with
I
LIM_EN
selection. See Applications Information.
V
IN
(Pins 5, 6): Power Input. Tie to the PD input through
the diode bridge. Pins 5 and 6 must be electrically tied
together.
V
OUT
(Pins 7, 8): Power Output. Supplies power to the
PD load through the internal power MOSFET. V
OUT
is high
impedance until the input voltage rises above the UVLO
turn-on threshold. The output is then connected to V
IN
through a current-limited internal MOSFET switch. Pins 7
and 8 must be electrically tied together.
PWRGD (Pin 9): Active High Power Good Output, Open
Collector. Signals to the DC/DC converter that the LTC4264
MOSFET is on and that the converter can start operation.
High impedance indicates power is good. PWRGD is ref-
erenced to V
OUT
and is low impedance during inrush and
in the event of a thermal overload. PWRGD is clamped
14V above V
OUT
.
PWRGD (Pin 10): Active Low Power Good Output, Open-
Drain. Signals to the DC/DC converter that the LTC4264
MOSFET is on and that the converter can start operation.
Low impedance indicates power is good. PWRGD is
referenced to V
IN
and is high impedance during detec-
tion, classifi cation and in the event of a thermal overload.
PWRGD has no internal clamps.
NC (Pin11): No Internal Connection.
GND (Pin 12): Ground. Tie to system ground and power
return through the input diode bridge.
Exposed Pad (Pin 13): Must be soldered to electrically
isolated heat sink.
