16
LTC3733/LTC3733-1
3733f
δ = 0.005/°C can be used as an approximation for low
voltage MOSFETs.
The Schottky diodes, D1 to D3 shown in Figure 1 conduct
during the dead time between the conduction of the two
large power MOSFETs. This prevents the body diode of the
bottom MOSFET from turning on, storing charge during
the dead time and requiring a reverse recovery period
which could cost as much as several percent in efficiency.
A 2A to 8A Schottky is generally a good compromise for
both regions of operation due to the relatively small
average current. Larger diodes result in additional transi-
tion losses due to their larger junction capacitance.
C
IN
and C
OUT
Selection
Input capacitance ESR requirements and efficiency losses
are reduced substantially in a multiphase architecture
because the peak current drawn from the input capacitor
is effectively divided by the number of phases used and
power loss is proportional to the RMS current squared. A
3-stage, single output voltage implementation can reduce
input path power loss by 90%.
In continuous mode, the source current of each top
N-channel MOSFET is a square wave of duty cycle V
OUT
/V
IN
.
A low ESR input capacitor sized for the maximum RMS
current must be used. The details of a close form equation
can be found in Application Note 77. Figure 6 shows the
input capacitor ripple current for different phase configu-
rations with the output voltage fixed and input voltage
varied. The input ripple current is normalized against the
DC output current. The graph can be used in place of
tedious calculations. The minimum input ripple current
can be achieved when the product of phase number and
output voltage, N(V
OUT
), is approximately equal to the
input voltage V
IN
or:
V
V
k
N
where k N
OUT
IN
==12 1, ,...,
So the phase number can be chosen to minimize the input
capacitor size for the given input and output voltages.
In the graph of Figure 6, the local maximum input RMS
capacitor currents are reached when:
V
V
k
N
where k N
OUT
IN
==
21
12
, ,...,
These worst-case conditions are commonly used for de-
sign because even significant deviations do not offer much
relief. Note that capacitor manufacturer’s ripple current
ratings are often based on only 2000 hours of life. This
makes it advisable to further derate the capacitor or to
choose a capacitor rated at a higher temperature than re-
quired. Several capacitors may also be paralleled to meet
size or height requirements in the design. Always consult
the capacitor manufacturer if there is any question.
The Figure 6 graph shows that the peak RMS input current
is reduced linearly, inversely proportional to the number N
of stages used. It is important to note that the efficiency
loss is proportional to the input RMS current squared and
therefore a 3-stage implementation results in 90% less
power loss when compared to a single phase design.
Battery/input protection fuse resistance (if used), PC
APPLICATIO S I FOR ATIO
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DUTY FACTOR (V
OUT
/V
IN
)
0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8
0.9
0.6
0.5
0.4
0.3
0.2
0.1
0
3733 F06
RMS INPUT RIPPLE CURRNET
DC LOAD CURRENT
6-PHASE
4-PHASE
3-PHASE
2-PHASE
1-PHASE
Figure 6. Normalized Input RMS Ripple Current
vs Duty Factor for One to Six Output Stages
17
LTC3733/LTC3733-1
3733f
board trace and connector resistance losses are also
reduced by the reduction of the input ripple current in a
PolyPhase system. The required amount of input capaci-
tance is further reduced by the factor, N, due to the
effective increase in the frequency of the current pulses.
Ceramic capacitors are becoming very popular for small
designs but several cautions should be observed. “X7R”,
“X5R” and “Y5V” are examples of a few of the ceramic
materials used as the dielectric layer, and these different
dielectrics have very different effect on the capacitance
value due to the voltage and temperature conditions
applied. Physically, if the capacitance value changes due
to applied voltage change, there is a concommitant piezo
effect which results in radiating sound! A load that draws
varying current at an audible rate may cause an attendant
varying input voltage on a ceramic capacitor, resulting in
an audible signal. A secondary issue relates to the energy
flowing back into a ceramic capacitor whose capacitance
value is being reduced by the increasing charge. The
voltage can increase at a considerably higher rate than the
constant current being supplied because the capacitance
value is decreasing as the voltage is increasing! Ceramic
capacitors, when properly selected and used however, can
provide the lowest overall loss due to their extremely low
ESR.
The selection of C
OUT
is driven by the required effective
series resistance (ESR). Typically once the ESR require-
ment is satisfied the capacitance is adequate for filtering.
The steady-state output ripple (V
OUT
) is determined by:
∆∆V I ESR
NfC
OUT RIPPLE
OUT
≈+
1
8
where f = operating frequency of each stage, N is the
number of output stages, C
OUT
= output capacitance and
I
L
= ripple current in each inductor. The output ripple is
highest at maximum input voltage since I
L
increases
with input voltage. The output ripple will be less than 50mV
at max V
IN
with I
L
= 0.4I
OUT(MAX)
assuming:
C
OUT
required ESR < N • R
SENSE
and
C
OUT
> 1/(8Nf)(R
SENSE
)
The emergence of very low ESR capacitors in small,
surface mount packages makes very small physical imple-
mentations possible. The ability to externally compensate
the switching regulator loop using the I
TH
pin allows a
much wider selection of output capacitor types. The
impedance characteristics of each capacitor type is sig-
nificantly different than an ideal capacitor and therefore
requires accurate modeling or bench evaluation during
design.
Manufacturers such as Nichicon, United Chemicon and
Sanyo should be considered for high performance through-
hole capacitors. The OS-CON semiconductor dielectric
capacitor available from Sanyo and the Panasonic SP
surface mount types have a good (ESR)(size) product.
Once the ESR requirement for C
OUT
has been met, the
RMS current rating generally far exceeds the I
RIPPLE(P-P)
requirement. Ceramic capacitors from AVX, Taiyo Yuden,
Murata and Tokin offer high capacitance value and very
low ESR, especially applicable for low output voltage
applications.
In surface mount applications, multiple capacitors may
have to be paralleled to meet the ESR or RMS current
handling requirements of the application. Aluminum elec-
trolytic and dry tantalum capacitors are both available in
surface mount configurations. New special polymer sur-
face mount capacitors offer very low ESR also but have
much lower capacitive density per unit volume. In the case
of tantalum, it is critical that the capacitors are surge tested
for use in switching power supplies. Several excellent
choices are the AVX TPS, AVX TPSV, the KEMET T510
APPLICATIO S I FOR ATIO
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18
LTC3733/LTC3733-1
3733f
series of sur
face-mount tantalums or the Panasonic SP
series of surface mount special polymer capacitors avail-
able in case heights ranging from 2mm to 4mm. Other
capacitor types include Sanyo POS-CAP, Sanyo OS-CON,
Nichicon PL series and Sprague 595D series. Consult the
manufacturer for other specific recommendations.
R
SENSE
Selection for Output Current
Once the frequency and inductor have been chosen,
R
SENSE1,
R
SENSE2,
R
SENSE3
are determined based on the
required peak inductor current. The current comparator
has a maximum threshold of 75mV/R
SENSE
and an input
common mode range of SGND to (1.1) • V
CC
. The current
comparator threshold sets the peak inductor current,
yielding a maximum average output current I
MAX
equal to
the peak value less half the peak-to-peak ripple current,
I
L
.
Allowing a margin for variations in the IC and external
component values yields:
RN
mV
I
SENSE
MAX
=
50
The IC works well with values of R
SENSE
from 0.001 to
0.02.
V
CC
Decoupling
The V
CC
pin supples power not only the internal circuits of
the controller but also the top and bottom gate drivers and
therefore must be bypassed very carefully to ground with
a ceramic capacitor, type X7R or X5R (depending upon
the operating temperature environment) of
at least 1
µ
F
imme
diately next to the IC
and preferably an additional
10µF placed very close to the IC due to the extremely high
instantaneous currents involved. The total capacitance,
taking into account the voltage coefficient of ceramic
capacitors, should be 100 times as large as the total
combined gate charge capacitance of ALL of the MOSFETs
being driven. Good bypassing close to the IC is necessary
to supply the high transient currents required by the
MOSFET gate drivers while keeping the 5V supply quiet
enough so as not to disturb the very small-signal high
bandwidth of the current comparators.
Topside MOSFET Driver Supply (C
B
, D
B
)
External bootstrap capacitors, C
B
, connected to the BOOST
pins, supply the gate drive voltages for the topside
MOSFETs. Capacitor C
B
in the Functional Diagram is
charged though diode D
B
from V
CC
when the SW pin is
low. When one of the topside MOSFETs turns on, the
driver places the C
B
voltage across the gate-source of the
desired MOSFET. This enhances the MOSFET and turns on
the topside switch. The switch node voltage, SW, rises to
V
IN
and the BOOST pin follows. With the topside MOSFET
on, the boost voltage is above the input supply (V
BOOST
=
V
CC
+ V
IN
). The value of the boost capacitor C
B
needs to be
30 to 100 times that of the total input capacitance of the
topside MOSFET(s). The reverse breakdown of D
B
must be
greater than V
IN(MAX).
Differential Amplifier
The IC has a true remote voltage sense capability. The
sensing connections should be returned from the load,
back to the differential amplifier’s inputs through a com-
mon, tightly coupled pair of PC traces. The differential
amplifier rejects common mode signals capacitively or
inductively radiated into the feedback PC traces as well as
ground loop disturbances. The differential amplifier out-
put signal is divided down through the VID DAC and is
compared with the internal, precision 0.6V voltage refer-
ence by the error amplifier.
The amplifier has a 0 to V
CC
common mode input range
and an output swing range of 0 to V
CC
– 1.2V. The output
uses an NPN emitter follower with 80k feedback resis-
tance. A DC resistive load to ground is required in order to
sink more current.
APPLICATIO S I FOR ATIO
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LTC3733CG#TRPBF

Mfr. #:
Manufacturer:
Analog Devices / Linear Technology
Description:
Switching Voltage Regulators 3-Phase, AMD 5-Bit VID, 600kHz Sync. Buck Switching Controller
Lifecycle:
New from this manufacturer.
Delivery:
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