FM22L16
Document Number: 001-86188 Rev. *E Page 7 of 22
Software Write-Protect Timing
Figure 4. Sequence to Set Write-Protect Blocks
[1]
Figure 5. Sequence to Read Write-Protect Settings
[1]
CE
WE
24555
X
Data
OE
02333 1CCCC 000FF 3EF00 1CCCC 000003AAAA
t
CE
(read access time)
3AAAA
A
17-0
DQ
15-0
Note
1. This sequence requires t
AS
> 10 ns and address must be stable while CE is LOW.
FM22L16
Document Number: 001-86188 Rev. *E Page 8 of 22
SRAM Drop-In Replacement
The FM22L16 is designed to be a drop-in replacement for
standard asynchronous SRAMs. The device does not require CE
to toggle for each new address. CE may remain LOW indefinitely.
While CE
is LOW, the device automatically detects address
changes and a new access begins. This functionality allows CE
to be grounded as you might with an SRAM. It also allows page
mode operation at speeds up to 40 MHz.
Figure 6 shows a pull-up resistor on CE
, which will keep the pin
HIGH during power cycles, assuming the MCU / MPU pin
tristates during the reset condition. The pull-up resistor value
should be chosen to ensure the CE
pin tracks V
DD
to a high
enough value, so that the current drawn when CE is LOW is not
an issue. A 10-k resistor draws 330 µA when CE
is LOW and
V
DD
= 3.3 V
Note that if CE is tied to ground, the user must be sure WE is not
LOW at power-up or power-down events. If CE
and WE are both
LOW during power cycles, data will be corrupted. Figure 7 shows
a pull-up resistor on WE
, which will keep the pin HIGH during
power cycles, assuming the MCU / MPU pin tristates during the
reset condition.The pull-up resistor value should be chosen to
ensure the WE
pin tracks V
DD
to a high enough value, so that
the current drawn when WE
is LOW is not an issue. A 10-k
resistor draws 330 µA when WE is LOW and V
DD
= 3.3 V.
Note If CE
is tied to ground, the user gives up the ability to
perform the software write-protect sequence.
For applications that require the lowest power consumption, the
CE
signal should be active (LOW) only during memory accesses.
The FM22L16 draws supply current while CE is LOW, even if
addresses and control signals are static. While CE
is HIGH, the
device draws no more than the maximum standby current, I
SB
.
CE
toggling LOW on every address access is perfectly
acceptable in FM22L16.
The UB
and LB byte select pins are active for both read and write
cycles. They may be used to allow the device to be wired as a
512K × 8 memory. The upper and lower data bytes can be tied
together and controlled with the byte selects. Individual byte
enables or the next higher address line A
18
may be available
from the system processor.
Figure 6. Use of Pull-up Resistor on CE
MCU / MPU
CE
WE
OE
A
17-0
DQ
15-0
FM22L16
V
DD
Figure 7. Use of Pull-up Resistor on WE
Figure 8. FM22L16 Wired as 512K x 8
MCU / MPU
CE
WE
OE
A
17-0
DQ
15-0
FM22L16
V
DD
DQ
CE
UB
LB
WE
OE
ZZ
4-Mbit F-RAM
FM22L16
A
15-8
DQ
7-0
D
7-0
17-0
A
18
A
17-0
FM22L16
Document Number: 001-86188 Rev. *E Page 9 of 22
Maximum Ratings
Exceeding maximum ratings may shorten the useful life of the
device. These user guidelines are not tested.
Storage temperature ................................ –55 C to +125 C
Maximum accumulated storage time
At 125 °C ambient temperature ................................. 1000 h
At 85 °C ambient temperature ................................ 10 Years
Ambient temperature
with power applied ................................... –55 °C to +125 °C
Supply voltage on V
DD
relative to V
SS
........–1.0 V to + 4.5 V
Voltage applied to outputs
in High Z state .................................... –0.5 V to V
DD
+ 0.5 V
Input voltage .......... –1.0 V to + 4.5 V and V
IN
< V
DD
+ 1.0 V
Transient voltage (< 20 ns) on
any pin to ground potential ................. –2.0 V to V
CC
+ 2.0 V
Package power dissipation
capability (T
A
= 25 °C) ................................................. 1.0 W
Surface mount Pb soldering
temperature (3 seconds) ......................................... +260 C
DC output current (1 output at a time, 1s duration) .... 15 mA
Static discharge voltage
Human Body Model (
JEDEC Std JESD22-A114-D) ........ 2.5 kV
Charged Device Model (
JEDEC Std JESD22-C101-C) ... 1.5 kV
Machine Model (JEDEC Std JESD22-A115-A) ................. 150 V
Latch-up current ................................................... > 100 mA
Operating Range
Range Ambient Temperature (T
A
) V
DD
Industrial –40 C to +85 C 2.7 V to 3.6 V
DC Electrical Characteristics
Over the Operating Range
Parameter Description Test Conditions Min Typ
[2]
Max Unit
V
DD
Power supply voltage 2.7 3.3 3.6 V
I
DD
V
DD
supply current V
DD
= 3.6 V, CE cycling at min. cycle time. All
inputs toggling at CMOS levels
(0.2 V or V
DD
– 0.2 V), all DQ pins unloaded.
–812mA
I
SB
Standby current V
DD
= 3.6 V, CE at V
DD
,
All other pins are static and at
CMOS levels
(0.2 V or V
DD
– 0.2 V), ZZ is HIGH
T
A
= 25 C– 90150µA
T
A
= 85 C– 270µA
I
ZZ
Sleep mode current V
DD
= 3.6 V, ZZ is LOW,
all other inputs at CMOS levels
(0.2 V or V
DD
– 0.2 V).
T
A
= 25 C––5µA
T
A
= 85 C––8µA
I
LI
Input leakage current V
IN
between V
DD
and V
SS
––+A
I
LO
Output leakage current V
OUT
between V
DD
and V
SS
––+A
V
IH
Input HIGH voltage 2.2 V
DD
+ 0.3 V
V
IL
Input LOW voltage – 0.3 0.6 V
V
OH1
Output HIGH voltage I
OH
= –1.0 mA 2.4 V
V
OH2
Output HIGH voltage I
OH
= –100 µA V
DD
– 0.2 V
V
OL1
Output LOW voltage I
OL
= 2.1 mA 0.4 V
V
OL2
Output LOW voltage I
OL
= 100 µA 0.2 V
Note
2. Typical values are at 25 °C, V
DD
= V
DD
(typ). Not 100% tested.

FM22L16-55-TG

Mfr. #:
Manufacturer:
Cypress Semiconductor
Description:
F-RAM 4M (256Kx16) 55ns F-RAM
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
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