Data Sheet SSM4321
Rev. 0 | Page 21 of 24
APPLICATIONS INFORMATION
LAYOUT
As output power increases, care must be taken to lay out PCB
traces and wires properly between the amplifier, load, and power
supply. A good practice is to use short, wide PCB tracks to decrease
voltage drops and minimize inductance. Ensure that track widths
are at least 200 mil for every inch of track length for lowest DCR,
and use 1 oz or 2 oz copper PCB traces to further reduce IR drops
and inductance. A poor layout increases voltage drops, conse-
quently affecting efficiency. Use large traces for the power supply
inputs and amplifier outputs to minimize losses due to parasitic
trace resistance.
Proper grounding helps to improve audio performance, mini-
mize crosstalk between channels, and prevent switching noise
from coupling into the audio signal. To maintain high output
swing and high peak output power, the PCB traces that connect
the output pins to the load, as well as the PCB traces to the supply
pins, should be as wide as possible to maintain the minimum trace
resistances. It is also recommended that a large ground plane be
used for minimum impedances.
In addition, good PCB layout isolates critical analog paths from
sources of high interference. Separate high frequency circuits
(analog and digital) from low frequency circuits.
Properly designed multilayer PCBs can reduce EMI emissions
and increase immunity to the RF field by a factor of 10 or more
compared with double-sided boards. A multilayer board allows
a complete layer to be used for the ground plane, whereas the
ground plane side of a double-sided board is often disrupted by
signal crossover.
If the system has separate analog and digital ground and power
planes, the analog ground plane should be directly beneath the
analog power plane, and, similarly, the digital ground plane should
be directly beneath the digital power plane. There should be no
overlap between the analog and digital ground planes or between
the analog and digital power planes.
INPUT CAPACITOR SELECTION
The SSM4321 does not require input coupling capacitors if
the input signal is biased from 1.0 V to PVDD − 1.0 V. Input
capacitors are required if the input signal is not biased within
this recommended input dc common-mode voltage range, if
high-pass filtering is needed, or if a single-ended source is used.
If high-pass filtering is needed at the input, the input capacitor
(C
IN
) and the input impedance of the SSM4321 (80 kΩ) form a
high-pass filter with a corner frequency determined by the
following equation:
f
C
= 1/(2π × 80 kΩ × C
IN
)
The input capacitor value and the dielectric material can
significantly affect the performance of the circuit. Not using
input capacitors degrades both the output offset voltage of the
amplifier and the dc PSRR performance.
POWER SUPPLY DECOUPLING
To ensure high efficiency, low total harmonic distortion (THD),
and high PSRR, proper power supply decoupling is necessary.
Noise transients on the power supply lines are short-duration
voltage spikes. These spikes can contain frequency components
that extend into the hundreds of megahertz. The power supply
input must be decoupled with a good quality, low ESL, low ESR
capacitor, with a minimum value of 4.7 µF. This capacitor bypasses
low frequency noises to the ground plane. For high frequency
transient noises, use a 0.1 µF capacitor as close as possible to the
PVDD pin of the device. Placing the decoupling capacitors as
close as possible to the SSM4321 helps to maintain efficient
performance.
