1
®
FN9213.2
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774
| Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright Intersil Americas Inc. 2006, 2010. All Rights Reserved. R
3
Technology™ is a trademark of Intersil Americas Inc.
All other trademarks mentioned are the property of their respective owners.
ISL6263
5-Bit VID Single-Phase Voltage Regulator
for IMVP-6+ Santa Rosa GPU Core
The ISL6263 IC is a Single-Phase Synchronous-Buck PWM
voltage regulator featuring Intersil’s Robust Ripple Regulator
(R
3
) Technology™. The ISL6263 is an implementation of the
Intel
®
Mobile Voltage Positioning (IMVP) protocol for GPU
Render Engine core power. Integrated MOSFET drivers,
bootstrap diode, and droop amplifier result in lower
component cost and smaller implementation area.
Intersil’s R
3
Technology™ combines the best features of
both fixed-frequency PWM and hysteretic PWM, delivering
excellent light-load efficiency and superior load transient
response by commanding variable switching frequency
during the transitory event.
To maximize light load efficiency, the ISL6263 automatically
transitions between continuous-conduction-mode (CCM)
and discontinuous-conduction-mode (DCM.) During DCM
the low-side MOSFET enters diode-emulation-mode (DEM.)
DEM is enabled whenever a Render Suspend state has
been set on the VID inputs. Optionally, DEM can be enabled
for all VID states by setting the FDE pin high. The ISL6263
has an audio filter that can be enabled in any Render
Suspend state by pulling the AF_EN pin high. The audio
filter prevents the PWM switching frequency from entering
the audible spectrum due to extremely light load while in
DEM.
The Render core voltage can be dynamically programmed
from 0.41200V to 1.28750V by the five VID input pins
without requiring sequential stepping of the VID states. The
ISL6263 uses the same capacitor for the soft-start slew-rate
and for the dynamic VID slew-rate by internally connecting
the SOFT pin to the appropriate current source. Processor
socket Kelvin sensing is accomplished with an integrated
unity-gain true differential amplifier.
Features
Precision single-phase core voltage regulator
- 0.5% system accuracy 0°C to +100°C
- Differential remote GPU die voltage sensing
- Differential droop voltage sensing
Applications up to 25A
Input voltage range: +5.0V to +25.0V
Programmable PWM frequency: 200kHz to 500kHz
Pre-biased output start-up capability
5-bit voltage identification input (VID)
- 1.28750 to 0.41200V
- 25.75mV steps
- Sequential or non-sequential VID change on-the-fly
Selectable diode emulation mode
- Render Suspend mode only
- Render Performance and Render Suspend mode
Selectable audio filter in render suspend mode
Integrated MOSFET drivers and bootstrap diode
Choice of current sensing schemes
- Lossless inductor DCR current sensing
- Precision resistive current sensing
Overvoltage, undervoltage, and overcurrent protection
Pb-free plus anneal available (RoHS compliant)
Pinout
ISL6263 (32 LD 5x5 QFN)
TOP VIEW
1
2
3
4
5
6
7
8
24
23
22
21
20
19
18
17
32 31 30 29 28 27 26 25
9 10111213141516
GND PAD
(BOTTOM)
RBIAS
VSEN
VDIFF
FB
COMP
VW
OCSET
SOFT
VID1
VID0
PVCC
LGATE
PGND
PHASE
UGATE
BOOT
RTN
V
I
D
2
V
I
D
3
V
I
D
4
I
2
U
A
V
R
_
O
N
F
D
E
P
G
O
O
D
A
F
_
E
N
VDD
VSS
VIN
VSUM
VO
DFB
DROOP
Data Sheet June 10, 2010
2
FN9213.2
June 10, 2010
Ordering Information
PART NUMBER
(Notes 2, 3)
PART
MARKING
TEMP RANGE
(°C)
PACKAGE
(Pb-Free)
PKG.
DWG. #
ISL6263CRZ ISL 6263CRZ -10 to 100 32 Ld 5x5 QFN L32.5x5
ISL6263CRZ-T
(Note 1)
ISL 6263CRZ -10 to 100 32 Ld 5x5 QFN Tape & Reel L32.5x5
NOTES:
1. Please refer to TB347 for details on reel specifications.
2. These Intersil Pb-free plastic packaged products employ special Pb-free material sets, molding compounds/die attach materials, and 100% matte
tin plate plus anneal (e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations). Intersil
Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-
020.
3. For Moisture Sensitivity Level (MSL), please see device information page for ISL6263
. For more information on MSL please see techbrief TB363.
ISL6263
3
FN9213.2
June 10, 2010
Block Diagram
FIGURE 1. SIMPLIFIED FUNCTIONAL BLOCK DIAGRAM OF THE ISL6263
PWM
OCSET
VSUM
DFB
BOOT
UGATE
LGATE
PVCC
PHASE
SHOOT THROUGH
PROTECTION
DRIVER
DRIVER
V
COMP
VDD
Σ
+
+
+
+
+
VID0
VID DAC
VID1
VID2
VID3
VID4
DROOP
VO
VSEN
RTN
VSS
RBIAS
+
+
VDIFF
+
V
REF
E/A
+
+
SOFT FB COMP
PGND
FDE
AF_EN
VIN
VW
g
m
V
soft
g
m
V
in
V
W
Δ V
W
33%
I
SS
I
DVID
1:1
+
OCP
SCP
SHORT
VREF
PGOOD
POR
2
×
SEVERE
OVERVOLTAGE
CONTROL
FAULT
DIODE
EMULATION
I2UA
VR_ON PGOOD
PWM
CONTROL
1.545V
CIRCUIT
OVER
CURRENT
OVER
VOLTAGE
UNDER
VOLTAGE
R
3
MODULATOR
LATCH
SOFT
CROWBAR
AUDIBLE
FREQUENCY
FILTER
ISL6263

ISL6263CRZ

Mfr. #:
Manufacturer:
Renesas / Intersil
Description:
Voltage Regulators - Switching Regulators 1 PHS INT DC/DC BUCK CNTRLR FOR INTEL
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
T/T Paypal Visa MoneyGram Western Union

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