7
FN9213.2
June 10, 2010
Frequency Range 200 - 500 kHz
AMPLIFIERS
Error Amplifier DC Gain (Note 8) A
V0
-90-dB
Error Amplifier Gain-Bandwidth Product
(Note 8)
GBW C
L
= 20pF - 18 - MHz
Error Amp Slew Rate (Note 8) SR C
L
= 20pF - 5 - V/µs
FB Input Bias Current I
FB
V
FB
= 1.28750V - 10 150 nA
Droop Amplifier Offset
V
DROOP_OFS
-0.3 - 0.3 mV
RBIAS Voltage
V
RBIAS
R
RBIAS
=150kΩ 1.50 1.52 1.54 V
I2UA Reference Current
I
I2UA
V
I2UA
= 2.5V 1.85 2.00 2.15 µA
SOFT-START CURRENT
Soft-Start Current I
SS
-46 -41 -36 µA
Soft Dynamic VID Current I
DVID
|SOFT - REF|>100mV ±175 ±200 ±225 µA
GATE DRIVER
UGATE Source Resistance R
UGSRC
500mA Source Current - 1.0 1.5 Ω
UGATE Source Current (Note 7) I
UGSRC
V
UGATE_PHASE
= 2.5V - 2.0 - A
UGATE Sink Resistance R
UGSNK
500mA Sink Current - 1.0 1.5 Ω
UGATE Sink Current (Note 7) I
UGSNK
V
UGATE_PHASE
= 2.5V - 2.0 - A
LGATE Source Resistance R
LGSRC
500mA Source Current - 1.0 1.5 Ω
LGATE Source Current (Note 7) I
LGSRC
V
LGATE_PGND
= 2.5V - 2.0 - A
LGATE Sink Resistance R
LGSNK
500mA Sink Current - 0.5 0.9 Ω
LGATE Sink Current (Note 7) I
LGSNK
V
LGATE_PGND
= 2.5V - 4.0 - A
UGATE Pull-Down Resistor (Note 7) R
PD
-1.1- kΩ
UGATE Turn-On Propagation Delay t
PDRU
PV
CC
= 5V, UGATE open 20 30 44 ns
LGATE Turn-On Propagation Delay t
PDRL
PV
CC
= 5V, LGATE open 7 15 30 ns
BOOTSTRAP DIODE
Forward Voltage V
F
PVCC = 5V, I
F
= 10mA 0.56 0.69 0.76 V
Reverse Leakage I
R
V
R
= 16V - - 5.0 µA
POWER GOOD and PROTECTION MONITOR
PGOOD Low Voltage V
PGOOD
I
PGOOD
= 4mA - 0.11 0.40 V
PGOOD Leakage Current I
PGOOD
V
PGOOD
= 3.3V -1.0 - 1.0 µA
Overvoltage Threshold (VO - VSOFT) V
OVP
V
O
rising above V
SOFT
> 1ms 160 200 240 mV
Severe Overvoltage Threshold V
OVPS
V
O
rising above 1.55V reference > 0.5µs 1.525 1.550 1.575 V
OCSET Reference Current I
OCSET
R
RBIAS
= 150kΩ 9.9 10.1 10.3 µA
OCSET Voltage Threshold Offset V
OCSET_OFS
V
DROOP
rising above V
OCSET
> 120µs -3 - 3 mV
Undervoltage Threshold (VSOFT - VO) V
UVF
V
O
falling below V
SOFT
for > 1ms -360 -300 -240 mV
CONTROL INPUTS
VR_ON Input Low V
VR_ONL
--1 V
Electrical Specifications These specifications apply for T
A
= -10°C to +100°C, unless otherwise stated. All typical specifications
T
A
= +25°C, VDD = 5V, PVCC = 5V. Boldface limits apply over the operating temperature range,
-10°C to +100°C. (Continued)
PARAMETER SYMBOL TEST CONDITIONS
MIN
(Note 6) TYP
MAX
(Note 6) UNITS
ISL6263
8
FN9213.2
June 10, 2010
Functional Pin Descriptions
RBIAS (Pin 1) - Sets the internal 10µA current reference.
Connect a 150kΩ ±1% resistor from RBIAS to VSS.
SOFT (Pin 2) - Sets the output voltage slew-rate. Connect
an X5R or X7R ceramic capacitor from SOFT to VSS. The
SOFT pin is the non-inverting input of the error amplifier.
OCSET (Pin 3) - Sets the overcurrent threshold. Connect a
resistor from OCSET to VO.
VW (Pin 4) - Sets the static PWM switching frequency in
continuous conduction mode. Connect a resistor from VW to
COMP.
COMP (Pin 5) - Connects to the output of the control loop
error amplifier.
FB (Pin 6) - Connects to the inverting input of the control
loop error amplifier.
VDIFF (Pin 7) - Connects to the output of the VDIFF
differential-summing amplifier.
VSEN (Pin 8) - This is the V
CC_SNS
input of the processor
socket Kelvin connection. Connects internally to one of two
non-inverting inputs of the VDIFF differential-summing
amplifier.
RTN (Pin 9) - This is the V
SS_SNS
input of the processor
socket Kelvin connection. Connects internally to one of two
inverting inputs of the VDIFF differential-summing amplifier.
DROOP (Pin 10) - Connects to the output of the droop
differential amplifier and to one of two non-inverting inputs of
the VDIFF differential-summing amplifier.
DFB (Pin 11) - This is the feedback of the droop amplifier.
Connects internally to the inverting input of the droop
differential amplifier.
VO (Pin 12) - Connects to one of two inverting inputs of the
VDIFF differential-summing amplifier.
VSUM (Pin 13) - Connects to the non-inverting input of the
droop differential amplifier.
VIN (Pin 14) - Connects to the R
3
PWM modulator providing
input voltage feed-forward. For optimum input voltage
transient response, connect near the drain of the high-side
MOSFETs.
VSS (Pin 15) - Analog ground.
VDD (Pin 16) - Input power supply for the IC. Connect to
+5VDC and decouple with at least a 1µF MLCC capacitor
from the VDD pin to the VSS pin.
VR_ON Input High V
VR_ONH
2.3 - - V
AF_EN Input Low V
AF_ENL
- - 1 V
AF_EN Input High V
AF_ENH
2.3 - - V
VR_ON Leakage I
VR_ONL
V
VR_ON
= 0V -1.0 0 - µA
I
VR_ONH
V
VR_ON
= 3.3V - 0 1.0 µA
AF_EN Leakage I
AF_ENL
V
AF_EN
= 0V -1.0 0 - µA
I
AF_ENH
V
AF_EN
= 3.3V - 0.45 1.0 µA
VID<4:0> Input Low V
VIDL
- - 0.3 V
VID<4:0> Input High V
VIDH
0.7 - - V
FDE Input Low V
FDEL
- - 0.3 V
FDE Input High V
FDEH
0.7 - - V
VID<4:0> Leakage I
VIDL
V
VID
= 0V -1.0 0 - µA
I
VIDH
V
VID
= 1.0V - 0.45 1.0 µA
FDE Leakage I
FDEL
V
FDE
= 0V -1.0 0 - µA
I
FDEH
V
FDE
= 1.0V - 0.45 1.0 µA
NOTES:
6. Parameters with MIN and/or MAX limits are 100% tested at +25°C, unless otherwise specified. Temperature limits established by characterization
and are not production tested.
7. Limits established by characterization and are not production tested.
8. Limits should be considered typical and are not production tested.
Electrical Specifications These specifications apply for T
A
= -10°C to +100°C, unless otherwise stated. All typical specifications
T
A
= +25°C, VDD = 5V, PVCC = 5V. Boldface limits apply over the operating temperature range,
-10°C to +100°C. (Continued)
PARAMETER SYMBOL TEST CONDITIONS
MIN
(Note 6) TYP
MAX
(Note 6) UNITS
ISL6263
9
FN9213.2
June 10, 2010
BOOT (Pin 17) - Input power supply for the high-side
MOSFET gate driver. Connect an MLCC bootstrap capacitor
from the BOOT pin to the PHASE pin.
UGATE (Pin 18) - High-side MOSFET gate driver output.
Connect to the gate of the high-side MOSFET.
PHASE (Pin 19) - Current return path for the UGATE high-
side MOSFET gate driver. Detects the polarity of the PHASE
node voltage for diode emulation. Connect the PHASE pin to
the drains of the low-side MOSFETs.
PGND (Pin 20) - Current return path for the LGATE low-side
MOSFET gate driver. The PGND pin only conducts current
when LGATE pulls down. Connect the PGND pin to the
sources of the low-side MOSFETs.
LGATE (Pin 21) - Low-side MOSFET gate driver output.
Connect to the gate of the low-side MOSFET.
PVCC (Pin 22) - Input power supply for the low-side
MOSFET gate driver, and the high-side MOSFET gate
driver, via the internal bootstrap diode connected between
the PVCC and BOOT pins. Connect to +5VDC and decouple
with at least 1µF of an MLCC capacitor from the PVCC pin to
the PGND pin.
VID0:VID4 (Pin 23:Pin 27) - Voltage identification inputs.
VID0 input is the least significant bit (LSB) and VID4 input is
the most significant bit (MSB).
I2UA (Pin 28) - Output of an internal 2µA current source.
Connect a 20kΩ resistor from the I2UA pin to the VSS pin.
VR_ON (Pin 29) - A high logic signal on this pin enables the
converter and a low logic signal disables the converter.
AF_EN (Pin 30) - A high logic signal on this pin enables the
audible frequency filter. A low logic signal on this pin
disables the audible frequency filter and improves the
converter efficiency.
PGOOD (Pin 31) - The PGOOD pin is an open-drain output
that indicates when the converter is able to supply regulated
voltage. Connect the PGOOD pin to a maximum of 5V
through a pull-up resistor.
FDE (Pin 32) - A low logic state on this pin confines the
availability of diode emulation mode to Render Suspend VID
states only. A high logic state on this pin enables diode
emulation for all VID states.
TABLE 1. FDE AND AF_EN STATE TABLE
RENDER
MODE FDE AF_EN
PWM
MODE
ΔV
W
AUDIO
FILTER
PERFORMANCE
00CCMxx
1 0 CCM/DCM x x
01CCMxx
1 1 CCM/DCM x x
SUSPEND
0 0 CCM/DCM +33% Off
1 0 CCM/DCM +33% Off
0 1 CCM/DCM None On
1 1 CCM/DCM None Off
TABLE 2. VID TABLE FOR INTEL IMVP-6+ V
CCGFX
CORE
VID4 VID3 VID2 VID1 VID0
V
CCGFX
(V)
RENDER PERFORMANCE STATES
xxxxx 0
0 0 0 0 0 1.28750
0 0 0 0 1 1.26175
0 0 0 1 0 1.23600
0 0 0 1 1 1.21025
0 0 1 0 0 1.18450
0 0 1 0 1 1.15875
0 0 1 1 0 1.13300
0 0 1 1 1 1.10725
0 1 0 0 0 1.08150
0 1 0 0 1 1.05575
0 1 0 1 0 1.03000
0 1 0 1 1 1.00425
0 1 1 0 0 0.97850
0 1 1 0 1 0.95275
0 1 1 1 0 0.92700
0 1 1 1 1 0.90125
1 0 0 0 0 0.87550
1 0 0 0 1 0.84975
ISL6263

ISL6263CRZ

Mfr. #:
Manufacturer:
Renesas / Intersil
Description:
Voltage Regulators - Switching Regulators 1 PHS INT DC/DC BUCK CNTRLR FOR INTEL
Lifecycle:
New from this manufacturer.
Delivery:
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